On 9/26/18 8:58 AM, Steve Ellcey wrote:
> PR rtl-optimization/85160 which allowed combine to convert
> two instructions into two different instructions if they had a lower cost
> caused a couple of regressions on aarch64. This patch fixes one of them.
>
> After the above patch, the gcc.dg/zero_bits_compound-1.c test on
> aarch64 generates an and rtl instruction where it did not before.
> A comparision of the code generated before and after the 85160 patch
> shows that GCC is still generating the same number of instructions
> but there are fewer dependencies between some of the instructions
> so the new code would be better on systems with multiple functional
> units and no worse on systems with a single functional unit.
>
> Since the test is just verifying that an 'and' rtl instruction is
> not generated and that is now happening on aarch64 but the new code
> is as good as or better than the old code this test doesn't seem
> to make sense for aarch64 anymore and I would like to just not
> run it on aarch64.
>
> Tested on aarch64. OK for checkin?
>
> Steve Ellcey
> sell...@cavium.com
>
>
> 2018-09-26 Steve Ellcey <sell...@cavium.com>
>
> PR testsuite/87433
> * gcc.dg/zero_bits_compound-1.c: Do not run on aarch64*-*-*.
OK.
jeff
