So the H8 port is the next planned conversion away from cc0. Given that
nearly every insn (including simple register moves) hits cc0,
essentially every pattern is going to need twiddling. Sigh.
This seems like a good time to fix some nits since the whole file is
about to change anyway.
This commit just fixes trailing whitespace problems.
Jeff
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a8c2629cdac..15becdc2466 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2018-07-02 Jeff Law <l...@redhat.com>
+
+ * config/h8300/h8300.md: Remove trailing whitespace.
+
2018-07-02 Jim Wilson <j...@sifive.com>
* config/riscv/riscv.c (riscv_expand_epilogue): Use emit_jump_insn
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 8464565a8a4..846fd735de0 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -880,7 +880,7 @@
;; ----------------------------------------------------------------------
(define_insn ""
- [(set (cc0)
+ [(set (cc0)
(compare (zero_extract:QI (match_operand:QI 0 "bit_memory_operand"
"r,U")
(const_int 1)
(match_operand 1 "const_int_operand" "n,n"))
@@ -902,7 +902,7 @@
(set_attr "cc" "set_zn")])
(define_insn_and_split "*tst_extzv_1_n"
- [(set (cc0)
+ [(set (cc0)
(compare (zero_extract:SI (match_operand:QI 0 "general_operand_src"
"r,U,mn>")
(const_int 1)
(match_operand 1 "const_int_operand" "n,n,n"))
@@ -927,7 +927,7 @@
(set_attr "cc" "set_zn,set_zn,set_zn")])
(define_insn ""
- [(set (cc0)
+ [(set (cc0)
(compare (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
(const_int 1)
(match_operand 1 "const_int_operand" "n"))
@@ -939,7 +939,7 @@
(set_attr "cc" "set_zn")])
(define_insn_and_split "*tstsi_upper_bit"
- [(set (cc0)
+ [(set (cc0)
(compare (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
(const_int 1)
(match_operand 1 "const_int_operand" "n"))
@@ -1004,7 +1004,7 @@
(set_attr "cc" "set_zn,set_zn,set_zn")])
(define_insn "*tstqi"
- [(set (cc0)
+ [(set (cc0)
(compare (match_operand:QI 0 "register_operand" "r")
(const_int 0)))]
""
@@ -1169,7 +1169,7 @@
"TARGET_H8300 && epilogue_completed"
[(const_int 0)]
{
- split_adds_subs (HImode, operands);
+ split_adds_subs (HImode, operands);
DONE;
})
@@ -1233,7 +1233,7 @@
""
[(const_int 0)]
{
- split_adds_subs (HImode, operands);
+ split_adds_subs (HImode, operands);
DONE;
})
@@ -1262,7 +1262,7 @@
(plus:SI (match_operand:SI 1 "h8300_dst_operand" "%0,0")
(match_operand:SI 2 "h8300_src_operand" "i,rQ")))]
"(TARGET_H8300H || TARGET_H8300S) && h8300_operands_match_p (operands)"
-{
+{
return output_plussi (operands);
}
[(set (attr "length")
@@ -1289,7 +1289,7 @@
"TARGET_H8300H || TARGET_H8300S"
[(const_int 0)]
{
- split_adds_subs (SImode, operands);
+ split_adds_subs (SImode, operands);
DONE;
})
@@ -1585,7 +1585,7 @@
"TARGET_H8300SX"
"divu.w\\t%T2,%T0"
[(set_attr "length" "2")])
-
+
(define_insn "divhi3"
[(set (match_operand:HI 0 "register_operand" "=r")
(div:HI (match_operand:HI 1 "register_operand" "0")
@@ -1593,7 +1593,7 @@
"TARGET_H8300SX"
"divs.w\\t%T2,%T0"
[(set_attr "length" "2")])
-
+
(define_insn "udivsi3"
[(set (match_operand:SI 0 "register_operand" "=r")
(udiv:SI (match_operand:SI 1 "register_operand" "0")
@@ -1601,7 +1601,7 @@
"TARGET_H8300SX"
"divu.l\\t%S2,%S0"
[(set_attr "length" "2")])
-
+
(define_insn "divsi3"
[(set (match_operand:SI 0 "register_operand" "=r")
(div:SI (match_operand:SI 1 "register_operand" "0")
@@ -1609,7 +1609,7 @@
"TARGET_H8300SX"
"divs.l\\t%S2,%S0"
[(set_attr "length" "2")])
-
+
(define_insn "udivmodqi4"
[(set (match_operand:QI 0 "register_operand" "=r")
(truncate:QI
@@ -2263,7 +2263,7 @@
if ((GET_CODE (operands[2]) != REG && operands[2] != const0_rtx)
&& TARGET_H8300)
operands[2] = force_reg (HImode, operands[2]);
- h8300_expand_branch (operands);
+ h8300_expand_branch (operands);
DONE;
})
@@ -2648,7 +2648,7 @@
[(const_int 0)]
""
{
- h8300_expand_prologue ();
+ h8300_expand_prologue ();
DONE;
})
@@ -2656,7 +2656,7 @@
[(return)]
""
{
- h8300_expand_epilogue ();
+ h8300_expand_epilogue ();
DONE;
})
@@ -2671,7 +2671,7 @@
else if (TARGET_H8300H)
return
"mov.l\\ter0,@-er7\;stc\\tccr,r0l\;mov.b\\tr0l,@(4,er7)\;mov.l\\t@er7+,er0\;orc\\t#128,ccr";
else if (TARGET_H8300S && TARGET_NEXR )
- return
"mov.l\\ter0,@-er7\;stc\tccr,r0l\;mov.b\tr0l,@(4,er7)\;mov.l\\t@er7+,er0\;orc\t#128,ccr";
+ return
"mov.l\\ter0,@-er7\;stc\tccr,r0l\;mov.b\tr0l,@(4,er7)\;mov.l\\t@er7+,er0\;orc\t#128,ccr";
else if (TARGET_H8300S && TARGET_NEXR && TARGET_NORMAL_MODE)
return
"subs\\t#2,er7\;mov.l\\ter0,@-er7\;stc\tccr,r0l\;mov.b\tr0l,@(4,er7)\;mov.l\\t@er7+,er0\;orc\t#128,ccr";
else if (TARGET_H8300S && TARGET_NORMAL_MODE)
@@ -2930,7 +2930,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_shift (QImode, ASHIFT, operands))
+ if (expand_a_shift (QImode, ASHIFT, operands))
DONE;
})
@@ -2940,7 +2940,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_shift (QImode, ASHIFTRT, operands))
+ if (expand_a_shift (QImode, ASHIFTRT, operands))
DONE;
})
@@ -2950,7 +2950,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_shift (QImode, LSHIFTRT, operands))
+ if (expand_a_shift (QImode, LSHIFTRT, operands))
DONE;
})
@@ -2960,8 +2960,8 @@
[(match_operand:QI 1 "h8300_dst_operand" "0")
(match_operand:QI 2 "const_int_operand" "")]))]
"h8300_operands_match_p (operands)"
-{
- return output_h8sx_shift (operands, 'b', 'X');
+{
+ return output_h8sx_shift (operands, 'b', 'X');
}
[(set_attr "length_table" "unary")
(set_attr "cc" "set_znv")])
@@ -2973,7 +2973,7 @@
(match_operand:QI 2 "nonmemory_operand" "r P3>X")]))]
""
{
- return output_h8sx_shift (operands, 'b', 'X');
+ return output_h8sx_shift (operands, 'b', 'X');
}
[(set_attr "length" "4")
(set_attr "cc" "set_znv")])
@@ -3001,7 +3001,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_shift (HImode, ASHIFT, operands))
+ if (expand_a_shift (HImode, ASHIFT, operands))
DONE;
})
@@ -3011,7 +3011,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_shift (HImode, LSHIFTRT, operands))
+ if (expand_a_shift (HImode, LSHIFTRT, operands))
DONE;
})
@@ -3021,7 +3021,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_shift (HImode, ASHIFTRT, operands))
+ if (expand_a_shift (HImode, ASHIFTRT, operands))
DONE;
})
@@ -3031,8 +3031,8 @@
[(match_operand:HI 1 "h8300_dst_operand" "0")
(match_operand:QI 2 "const_int_operand" "")]))]
"h8300_operands_match_p (operands)"
-{
- return output_h8sx_shift (operands, 'w', 'T');
+{
+ return output_h8sx_shift (operands, 'w', 'T');
}
[(set_attr "length_table" "unary")
(set_attr "cc" "set_znv")])
@@ -3044,7 +3044,7 @@
(match_operand:QI 2 "nonmemory_operand" "r P4>X")]))]
""
{
- return output_h8sx_shift (operands, 'w', 'T');
+ return output_h8sx_shift (operands, 'w', 'T');
}
[(set_attr "length" "4")
(set_attr "cc" "set_znv")])
@@ -3072,7 +3072,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_shift (SImode, ASHIFT, operands))
+ if (expand_a_shift (SImode, ASHIFT, operands))
DONE;
})
@@ -3082,7 +3082,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_shift (SImode, LSHIFTRT, operands))
+ if (expand_a_shift (SImode, LSHIFTRT, operands))
DONE;
})
@@ -3092,7 +3092,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_shift (SImode, ASHIFTRT, operands))
+ if (expand_a_shift (SImode, ASHIFTRT, operands))
DONE;
})
@@ -3103,7 +3103,7 @@
(match_operand:QI 2 "const_int_operand" "")]))]
"h8300_operands_match_p (operands)"
{
- return output_h8sx_shift (operands, 'l', 'S');
+ return output_h8sx_shift (operands, 'l', 'S');
}
[(set_attr "length_table" "unary")
(set_attr "cc" "set_znv")])
@@ -3114,8 +3114,8 @@
[(match_operand:SI 1 "register_operand" "0")
(match_operand:QI 2 "nonmemory_operand" "r P5>X")]))]
""
-{
- return output_h8sx_shift (operands, 'l', 'S');
+{
+ return output_h8sx_shift (operands, 'l', 'S');
}
[(set_attr "length" "4")
(set_attr "cc" "set_znv")])
@@ -3210,7 +3210,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_rotate (operands))
+ if (expand_a_rotate (operands))
DONE;
})
@@ -3231,7 +3231,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
""
{
- if (expand_a_rotate (operands))
+ if (expand_a_rotate (operands))
DONE;
})
@@ -3252,7 +3252,7 @@
(match_operand:QI 2 "nonmemory_operand" "")))]
"TARGET_H8300H || TARGET_H8300S"
{
- if (expand_a_rotate (operands))
+ if (expand_a_rotate (operands))
DONE;
})
@@ -3555,7 +3555,7 @@
(clobber (match_operand:HI 0 "register_operand"))]
"TARGET_H8300SX"
{
- h8300_expand_store (operands);
+ h8300_expand_store (operands);
DONE;
})
@@ -3566,7 +3566,7 @@
(clobber (match_operand:HI 0 "register_operand"))]
"TARGET_H8300SX"
{
- h8300_expand_store (operands);
+ h8300_expand_store (operands);
DONE;
})
@@ -3577,7 +3577,7 @@
(clobber (match_operand:HI 0 "register_operand"))]
"TARGET_H8300SX"
{
- h8300_expand_store (operands);
+ h8300_expand_store (operands);
DONE;
})
@@ -3609,7 +3609,7 @@
operands[5] = gen_rtx_COMPARE (VOIDmode, operands[3], operands[4]);
}
[(set_attr "cc" "set_znv,compare")])
-
+
(define_insn "*bstz"
[(set (zero_extract:QI (match_operand:QI 0 "bit_memory_operand" "+WU")
(const_int 1)
@@ -3650,7 +3650,7 @@
operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]);
}
[(set_attr "cc" "set_znv,compare")])
-
+
(define_insn "*condbset"
[(set (match_operand:QI 0 "bit_memory_operand" "=WU")
(if_then_else:QI (match_operator:QI 2 "eqne_operator"
@@ -3683,7 +3683,7 @@
operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]);
}
[(set_attr "cc" "set_znv,compare")])
-
+
(define_insn "*condbclr"
[(set (match_operand:QI 0 "bit_memory_operand" "=WU")
(if_then_else:QI (match_operator:QI 2 "eqne_operator"
@@ -3719,7 +3719,7 @@
operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]);
}
[(set_attr "cc" "set_znv,compare")])
-
+
(define_insn "*condbsetreg"
[(set (match_operand:QI 0 "bit_memory_operand" "=WU")
(if_then_else:QI (match_operator:QI 2 "eqne_operator"
@@ -3756,7 +3756,7 @@
operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]);
}
[(set_attr "cc" "set_znv,compare")])
-
+
(define_insn "*condbclrreg"
[(set (match_operand:QI 0 "bit_memory_operand" "=WU")
(if_then_else:QI (match_operator:QI 2 "eqne_operator"
@@ -4472,7 +4472,7 @@
(ashiftrt:SI (match_dup 0)
(const_int 1)))
(clobber (scratch:QI))])]
- {
+ {
operands[2] = gen_rtx_REG (HImode, REGNO (operands[0]));
})
@@ -4687,7 +4687,7 @@
"TARGET_H8300S && !TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG"
[(set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
(match_dup 0))]
- {
+ {
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
})
@@ -5968,7 +5968,7 @@
(if_then_else (match_dup 3)
(label_ref (match_dup 2))
(pc)))]
- {
+ {
operands[3] = gen_rtx_fmt_ee (GET_CODE (operands[1]) == GTU ? NE : EQ,
VOIDmode, cc0_rtx, const0_rtx);
})
@@ -6319,5 +6319,5 @@
&& !reg_overlap_mentioned_p (operands[0], operands[2])"
[(set (match_dup 2)
(match_dup 1))])
-
+
