pr39240.c fails at execution at -O1 and above for msp430, due to an erroneous
subreg expression in the zero_extendqisi2 msp430 insn pattern. This causes the
zero extension operation to get optimized out.
The attached patch fixes the insn pattern, and also removes the msp430x ISA
restriction on zero_extendqisi2 and zero_extendhisi2. The assembly instructions
in these patterns can be used in the base MSP430 ISA; they are not MSP430x
specific.
Successfully regtested the GCC testsuite for msp430-elf in the
-mcpu=msp430x/-mlarge configuration.
If the patch is acceptable, I would appreciate if someone would commit it for
me, as I don't have write access.
>From 4f96a05f4849e28064f5c202a55b753b59a106ef Mon Sep 17 00:00:00 2001
From: Jozef Lawrynowicz <joze...@mittosystems.com>
Date: Sun, 27 May 2018 21:09:49 +0100
Subject: [PATCH] MSP430: Fix PR39240 execution failure for msp430-elf
2018-05-28 Jozef Lawrynowicz <joze...@mittosystems.com>
* gcc/config/msp430/msp430.md: Remove erroneous subreg expression from
zero_extendqisi2 insn pattern. Remove msp430x ISA restriction on
zero_extend{q,h}isi2.
---
gcc/config/msp430/msp430.md | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md
index 869b9ee..614d375 100644
--- a/gcc/config/msp430/msp430.md
+++ b/gcc/config/msp430/msp430.md
@@ -619,15 +619,15 @@
(define_insn "zero_extendqisi2"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r")
- (zero_extend:SI (subreg:HI (match_operand:QI 1 "nonimmediate_operand" "rm") 0)))]
- "msp430x"
+ (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "rm")))]
+ ""
"MOV.B\t%1,%L0 { CLR\t%H0"
)
(define_insn "zero_extendhisi2"
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0,r")))]
- "msp430x"
+ ""
"@
MOV.W\t#0,%H0
MOV.W\t%1,%L0 { MOV.W\t#0,%H0"
--
2.7.4
