Hi!
For -masm=intel we currently emit invalid assembler for the v*gather*
insns,
vpgatherdd ymm0, (rax, ymm1, 1), ymm2
is some weird mixture of AT&T and Intel syntax. Furthermore,
by requiring a register as a base we unnecessarily penalize the code,
even when the base is constant or symbol, we force it into register, and
when it is a register + displacement, it is again forced into a register.
The following patch changes it so that we have a MEM with scalarssemode
(for -masm=intel to print the right DWORD PTR or QWORD PTR) with
UNSPEC_VSIBADDR as address. This UNSPEC contains the needed triplet
(base register/displacement/register+displacement, xmmN/ymmN register
and scale) and ix86_print_operand_address is taught to print it.
With this we emit e.g.
vpgatherdd ymm0, DWORD PTR base[16+ymm1*1], ymm2
or
vpgatherdd %ymm2, base+16(,%ymm1,1), %ymm0
Apparently VSIB addressing doesn't allow (%rip), so I had to reject certain
UNSPECs - those need to go into a lea.
Testcases have been adjusted so that they work with -masm=intel too and
additionally don't match just one arbitrary [xy]mm register type out of the
3, but all 3 and thus checks whether the right combination of
%xmmN.*%xmmO.*%xmmP, %ymmN.*%ymmO.*%ymmP, %xmmN.*%ymmO.*%xmmP
resp. %ymmN.*%xmmO.*%ymmP is used.
I've noticed at least my version of binutils (a couple of weeks old) doesn't
want to grok DWORD PTR base[16+ymm1] for scale 1, needs ymm1*1, so I'm
forcing the output of *1 for the VSIB addressing mode (for AT&T as groks it
even without it, I've forced the ,1 there anyway, but can remove it if
requested).
Regtested with {-m32,-m64} {,-fpic} {,-masm=intel} on i386.exp=*gather*.c
and additionally tried to assemble all of them in all those modes.
Ok for trunk?
2011-10-25 Jakub Jelinek <ja...@redhat.com>
* config/i386/i386.md (UNSPEC_VSIBADDR): New.
* config/i386/predicates.md (vsib_address_operand,
vsib_mem_operator): New predicates.
* config/i386/i386.c (ix86_print_operand_address): Handle
UNSPEC_VSIBADDR addresses.
* config/i386/sse.md (avx2_gathersi<mode>, avx2_gatherdi<mode>,
avx2_gatherdi<mode>256): Adjust expanders to use MEM with
UNSPEC_VSIBADDR address.
(*avx2_gathersi<mode>, *avx2_gatherdi<mode>, *avx2_gatherdi<mode>256):
Adjust insns to use MEM with UNSPEC_VSIBADDR address.
* gcc.target/i386/avx2-i32gatherd-1.c: Adjust scan-assembler regex
to work also with -masm=intel and additionally test the xmm vs. ymm
register type combination on mask/dest and in vsib.
* gcc.target/i386/avx2-i32gatherd256-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherd256-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherd-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherpd-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherpd256-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherpd256-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherpd-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherps-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherps256-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherps256-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherps-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherq-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherq256-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherq256-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherq-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherd-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherd256-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherd256-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherd-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherpd-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherpd256-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherpd256-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherpd-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherps-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherps256-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherps256-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherps-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherq-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherq256-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherq256-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherq-3.c: Likewise.
--- gcc/config/i386/i386.md.jj 2011-10-21 09:39:22.000000000 +0200
+++ gcc/config/i386/i386.md 2011-10-25 08:59:29.000000000 +0200
@@ -237,6 +237,7 @@ (define_c_enum "unspec" [
UNSPEC_VPERMSF
UNSPEC_VPERMTI
UNSPEC_GATHER
+ UNSPEC_VSIBADDR
;; For BMI support
UNSPEC_BEXTR
--- gcc/config/i386/predicates.md.jj 2011-10-10 09:41:28.000000000 +0200
+++ gcc/config/i386/predicates.md 2011-10-25 08:19:55.000000000 +0200
@@ -825,6 +825,42 @@ (define_predicate "lea_address_operand"
return parts.seg == SEG_DEFAULT;
})
+;; Return true if op if a valid base register, displacement or
+;; sum of base register and displacement for VSIB addressing.
+(define_predicate "vsib_address_operand"
+ (match_operand 0 "address_operand")
+{
+ struct ix86_address parts;
+ int ok;
+ rtx disp;
+
+ ok = ix86_decompose_address (op, &parts);
+ gcc_assert (ok);
+ if (parts.index || parts.seg != SEG_DEFAULT)
+ return false;
+
+ /* VSIB addressing doesn't support (%rip). */
+ if (parts.disp && GET_CODE (parts.disp) == CONST)
+ {
+ disp = XEXP (parts.disp, 0);
+ if (GET_CODE (disp) == PLUS)
+ disp = XEXP (disp, 0);
+ if (GET_CODE (disp) == UNSPEC)
+ switch (XINT (disp, 1))
+ {
+ case UNSPEC_GOTPCREL:
+ case UNSPEC_PCREL:
+ case UNSPEC_GOTNTPOFF:
+ return false;
+ }
+ }
+
+ return true;
+})
+
+(define_predicate "vsib_mem_operator"
+ (match_code "mem"))
+
;; Return true if the rtx is known to be at least 32 bits aligned.
(define_predicate "aligned_operand"
(match_operand 0 "general_operand")
--- gcc/config/i386/i386.c.jj 2011-10-24 12:21:14.000000000 +0200
+++ gcc/config/i386/i386.c 2011-10-25 09:00:52.000000000 +0200
@@ -14227,7 +14227,20 @@ ix86_print_operand_address (FILE *file,
struct ix86_address parts;
rtx base, index, disp;
int scale;
- int ok = ix86_decompose_address (addr, &parts);
+ int ok;
+ bool vsib = false;
+
+ if (GET_CODE (addr) == UNSPEC && XINT (addr, 1) == UNSPEC_VSIBADDR)
+ {
+ ok = ix86_decompose_address (XVECEXP (addr, 0, 0), &parts);
+ gcc_assert (parts.index == NULL_RTX);
+ parts.index = XVECEXP (addr, 0, 1);
+ parts.scale = INTVAL (XVECEXP (addr, 0, 2));
+ addr = XVECEXP (addr, 0, 0);
+ vsib = true;
+ }
+ else
+ ok = ix86_decompose_address (addr, &parts);
gcc_assert (ok);
@@ -14324,8 +14337,8 @@ ix86_print_operand_address (FILE *file,
if (index)
{
putc (',', file);
- print_reg (index, code, file);
- if (scale != 1)
+ print_reg (index, vsib ? 0 : code, file);
+ if (scale != 1 || vsib)
fprintf (file, ",%d", scale);
}
putc (')', file);
@@ -14375,8 +14388,8 @@ ix86_print_operand_address (FILE *file,
if (index)
{
putc ('+', file);
- print_reg (index, code, file);
- if (scale != 1)
+ print_reg (index, vsib ? 0 : code, file);
+ if (scale != 1 || vsib)
fprintf (file, "*%d", scale);
}
putc (']', file);
--- gcc/config/i386/sse.md.jj 2011-10-24 12:21:14.000000000 +0200
+++ gcc/config/i386/sse.md 2011-10-25 09:01:13.000000000 +0200
@@ -12722,28 +12722,38 @@ (define_expand "avx2_gathersi<mode>"
[(parallel [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "")
(unspec:VEC_GATHER_MODE
[(match_operand:VEC_GATHER_MODE 1 "register_operand" "")
- (match_operand 2 "register_operand" "")
+ (mem:<ssescalarmode>
+ (match_par_dup 7
+ [(match_operand 2 "vsib_address_operand" "")
+ (match_operand:<VEC_GATHER_MODE> 3
"register_operand" "")
+ (match_operand:SI 5 "const1248_operand " "")]))
(mem:BLK (scratch))
- (match_operand:<VEC_GATHER_MODE> 3 "register_operand" "")
- (match_operand:VEC_GATHER_MODE 4 "register_operand" "")
- (match_operand:SI 5 "const1248_operand " "")]
+ (match_operand:VEC_GATHER_MODE 4 "register_operand" "")]
UNSPEC_GATHER))
(clobber (match_scratch:VEC_GATHER_MODE 6 ""))])]
- "TARGET_AVX2")
+ "TARGET_AVX2"
+{
+ operands[7]
+ = gen_rtx_UNSPEC (Pmode, gen_rtvec (3, operands[2], operands[3],
+ operands[5]), UNSPEC_VSIBADDR);
+})
(define_insn "*avx2_gathersi<mode>"
[(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "=&x")
(unspec:VEC_GATHER_MODE
[(match_operand:VEC_GATHER_MODE 2 "register_operand" "0")
- (match_operand:P 3 "register_operand" "r")
+ (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
+ [(unspec:P
+ [(match_operand:P 3 "vsib_address_operand" "p")
+ (match_operand:<VEC_GATHER_MODE> 4 "register_operand" "x")
+ (match_operand:SI 6 "const1248_operand" "n")]
+ UNSPEC_VSIBADDR)])
(mem:BLK (scratch))
- (match_operand:<VEC_GATHER_MODE> 4 "register_operand" "x")
- (match_operand:VEC_GATHER_MODE 5 "register_operand" "1")
- (match_operand:SI 6 "const1248_operand" "n")]
+ (match_operand:VEC_GATHER_MODE 5 "register_operand" "1")]
UNSPEC_GATHER))
(clobber (match_scratch:VEC_GATHER_MODE 1 "=&x"))]
"TARGET_AVX2"
- "v<sseintprefix>gatherd<ssemodesuffix>\t{%1, (%3, %4, %p6), %0|%0, (%3, %4,
%p6), %1}"
+ "v<sseintprefix>gatherd<ssemodesuffix>\t{%1, %7, %0|%0, %7, %1}"
[(set_attr "type" "ssemov")
(set_attr "prefix" "vex")
(set_attr "mode" "<sseinsnmode>")])
@@ -12752,28 +12762,38 @@ (define_expand "avx2_gatherdi<mode>"
[(parallel [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "")
(unspec:VEC_GATHER_MODE
[(match_operand:VEC_GATHER_MODE 1 "register_operand" "")
- (match_operand 2 "register_operand" "")
+ (mem:<ssescalarmode>
+ (match_par_dup 7
+ [(match_operand 2 "vsib_address_operand" "")
+ (match_operand:<AVXMODE48P_DI> 3 "register_operand"
"")
+ (match_operand:SI 5 "const1248_operand " "")]))
(mem:BLK (scratch))
- (match_operand:<AVXMODE48P_DI> 3 "register_operand" "")
- (match_operand:VEC_GATHER_MODE 4 "register_operand" "")
- (match_operand:SI 5 "const1248_operand " "")]
+ (match_operand:VEC_GATHER_MODE 4 "register_operand" "")]
UNSPEC_GATHER))
(clobber (match_scratch:VEC_GATHER_MODE 6 ""))])]
- "TARGET_AVX2")
+ "TARGET_AVX2"
+{
+ operands[7]
+ = gen_rtx_UNSPEC (Pmode, gen_rtvec (3, operands[2], operands[3],
+ operands[5]), UNSPEC_VSIBADDR);
+})
(define_insn "*avx2_gatherdi<mode>"
[(set (match_operand:AVXMODE48P_DI 0 "register_operand" "=&x")
(unspec:AVXMODE48P_DI
[(match_operand:AVXMODE48P_DI 2 "register_operand" "0")
- (match_operand:P 3 "register_operand" "r")
+ (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
+ [(unspec:P
+ [(match_operand:P 3 "vsib_address_operand" "p")
+ (match_operand:<AVXMODE48P_DI> 4 "register_operand" "x")
+ (match_operand:SI 6 "const1248_operand" "n")]
+ UNSPEC_VSIBADDR)])
(mem:BLK (scratch))
- (match_operand:<AVXMODE48P_DI> 4 "register_operand" "x")
- (match_operand:AVXMODE48P_DI 5 "register_operand" "1")
- (match_operand:SI 6 "const1248_operand" "n")]
+ (match_operand:AVXMODE48P_DI 5 "register_operand" "1")]
UNSPEC_GATHER))
(clobber (match_scratch:AVXMODE48P_DI 1 "=&x"))]
"TARGET_AVX2"
- "v<sseintprefix>gatherq<ssemodesuffix>\t{%1, (%3, %4, %p6), %0|%0, (%3, %4,
%p6), %1}"
+ "v<sseintprefix>gatherq<ssemodesuffix>\t{%1, %7, %0|%0, %7, %1}"
[(set_attr "type" "ssemov")
(set_attr "prefix" "vex")
(set_attr "mode" "<sseinsnmode>")])
@@ -12784,28 +12804,38 @@ (define_expand "avx2_gatherdi<mode>256"
[(parallel [(set (match_operand:VI4F_128 0 "register_operand" "")
(unspec:VI4F_128
[(match_operand:VI4F_128 1 "register_operand" "")
- (match_operand 2 "register_operand" "")
+ (mem:<ssescalarmode>
+ (match_par_dup 7
+ [(match_operand 2 "vsib_address_operand" "")
+ (match_operand:V4DI 3 "register_operand" "")
+ (match_operand:SI 5 "const1248_operand " "")]))
(mem:BLK (scratch))
- (match_operand:V4DI 3 "register_operand" "")
- (match_operand:VI4F_128 4 "register_operand" "")
- (match_operand:SI 5 "const1248_operand " "")]
+ (match_operand:VI4F_128 4 "register_operand" "")]
UNSPEC_GATHER))
(clobber (match_scratch:VI4F_128 6 ""))])]
- "TARGET_AVX2")
+ "TARGET_AVX2"
+{
+ operands[7]
+ = gen_rtx_UNSPEC (Pmode, gen_rtvec (3, operands[2], operands[3],
+ operands[5]), UNSPEC_VSIBADDR);
+})
(define_insn "*avx2_gatherdi<mode>256"
[(set (match_operand:VI4F_128 0 "register_operand" "=x")
(unspec:VI4F_128
[(match_operand:VI4F_128 2 "register_operand" "0")
- (match_operand:P 3 "register_operand" "r")
+ (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
+ [(unspec:P
+ [(match_operand:P 3 "vsib_address_operand" "p")
+ (match_operand:V4DI 4 "register_operand" "x")
+ (match_operand:SI 6 "const1248_operand" "n")]
+ UNSPEC_VSIBADDR)])
(mem:BLK (scratch))
- (match_operand:V4DI 4 "register_operand" "x")
- (match_operand:VI4F_128 5 "register_operand" "1")
- (match_operand:SI 6 "const1248_operand" "n")]
+ (match_operand:VI4F_128 5 "register_operand" "1")]
UNSPEC_GATHER))
(clobber (match_scratch:VI4F_128 1 "=&x"))]
"TARGET_AVX2"
- "v<sseintprefix>gatherq<ssemodesuffix>\t{%1, (%3, %4, %p6), %0|%0, (%3, %4,
%p6), %1}"
+ "v<sseintprefix>gatherq<ssemodesuffix>\t{%1, %7, %0|%0, %7, %1}"
[(set_attr "type" "ssemov")
(set_attr "prefix" "vex")
(set_attr "mode" "<sseinsnmode>")])
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherd256-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherd256-1.c 2011-10-25
09:34:16.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherqd\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherq256-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherq256-3.c 2011-10-25
09:33:42.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherdq\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherd-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherd-3.c 2011-10-25
09:30:50.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherdd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherdd\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherq-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherq-3.c 2011-10-25
09:37:22.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherqq\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherpd-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherpd-1.c 2011-10-25
09:31:17.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherdpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherdpd\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherps-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherps-1.c 2011-10-25
09:35:32.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherqps\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherqps\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherq256-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherq256-1.c 2011-10-25
09:37:00.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherqq\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherpd-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherpd-1.c 2011-10-25
09:34:48.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherqpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherqpd\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherd-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherd-1.c 2011-10-25
09:28:48.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherdd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherdd\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherpd256-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherpd256-3.c 2011-10-25
09:31:52.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherdpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherdpd\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherps256-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherps256-3.c 2011-10-25
09:32:41.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherdps\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherdps\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherq-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherq-3.c 2011-10-25
09:33:52.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherdq\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherpd256-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherpd256-1.c 2011-10-25
09:31:34.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherdpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherdpd\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherq-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherq-1.c 2011-10-25
09:33:00.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherdq\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherd256-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherd256-3.c 2011-10-25
09:30:37.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherdd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherdd\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherq256-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherq256-3.c 2011-10-25
09:37:15.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherqq\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherps-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherps-3.c 2011-10-25
09:36:19.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherqps\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherqps\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherpd256-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherpd256-1.c 2011-10-25
09:35:05.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherqpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherqpd\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherpd-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherpd-3.c 2011-10-25
09:32:02.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherdpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherdpd\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherd256-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherd256-1.c 2011-10-25
09:30:15.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherdd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherdd\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherd-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherd-3.c 2011-10-25
09:34:36.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherqd\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherps-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherps-1.c 2011-10-25
09:32:12.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherdps\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherdps\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherps-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherps-3.c 2011-10-25
09:32:49.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherdps\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherdps\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherq256-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherq256-1.c 2011-10-25
09:33:29.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherdq\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherd256-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherd256-3.c 2011-10-25
09:34:27.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherqd\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherps256-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherps256-1.c 2011-10-25
09:35:56.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherqps\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherqps\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherpd256-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherpd256-3.c 2011-10-25
09:35:18.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherqpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherqpd\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherq-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherq-1.c 2011-10-25
09:36:27.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherqq\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i32gatherps256-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i32gatherps256-1.c 2011-10-25
09:32:28.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherdps\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherdps\[
\\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherps256-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherps256-3.c 2011-10-25
09:36:11.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherqps\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherqps\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherd-1.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherd-1.c 2011-10-25
09:34:00.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vpgatherqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vpgatherqd\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
--- gcc/testsuite/gcc.target/i386/avx2-i64gatherpd-3.c.jj 2011-08-26
18:41:38.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/avx2-i64gatherpd-3.c 2011-10-25
09:35:25.000000000 +0200
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx2 -O2" } */
-/* { dg-final { scan-assembler "vgatherqpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vgatherqpd\[
\\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]" } } */
#include <immintrin.h>
Jakub
