Hi!
On Fri, Mar 30, 2018 at 02:29:59PM -0500, Peter Bergner wrote:
> +;; A mode attribute to disparage use of GPR registers, except for scalar
> +;; interger modes.
Typo ("integer").
> +(define_mode_attr ??r [(V16QI "??r")
> + (V8HI "??r")
> + (V4SI "??r")
> + (V4SF "??r")
> + (V2DI "??r")
> + (V2DF "??r")
> + (DI "r")
> + (DF "??r")
> + (SF "??r")
> + (V1TI "??r")
> + (TI "r")
> + (TF "??r")
> + (KF "??r")])
Uuuuugly :-)
DI cannot happen, just remove it (it is not part of VSX_M). Neither
DF or SF.
> @@ -1200,7 +1216,7 @@ (define_insn_and_split "*xxspltib_<mode>
> (define_insn "*vsx_mov<mode>_64bit"
> [(set (match_operand:VSX_M 0 "nonimmediate_operand"
> "=ZwO, <VSa>, <VSa>, r, we, ?wQ,
> - ?&r, ??r, ??Y, ??r, wo, v,
> + ?&r, ??r, ??Y, <??r>, wo, v,
> ?<VSa>, *r, v, ??r, wZ, v")
>
> (match_operand:VSX_M 1 "input_operand"
> @@ -1229,7 +1245,7 @@ (define_insn "*vsx_mov<mode>_64bit"
> ;; LVX (VMX) STVX (VMX)
> (define_insn "*vsx_mov<mode>_32bit"
> [(set (match_operand:VSX_M 0 "nonimmediate_operand"
> - "=ZwO, <VSa>, <VSa>, ??r, ??Y, ??r,
> + "=ZwO, <VSa>, <VSa>, ??r, ??Y, <??r>,
> wo, v, ?<VSa>, *r, v, ??r,
> wZ, v")
We should give the same treatment to (most or all of) the other ??r in
those patterns, or more likely, split TI off to a separate pattern.
But okay (with the fixes), and okay for 7. Thanks!
Segher
