On Wed, Mar 21, 2018 at 2:45 AM, Richard Biener
<richard.guent...@gmail.com> wrote:
> On Tue, Mar 20, 2018 at 11:10 PM, Jim Wilson <j...@sifive.com> wrote:
>> This fixes a wrong-code issue on RISC-V, but in theory could be a problem for
>> any SHIFT_COUNT_TRUNCATED target.
> IMHO the real issue is that SHIFT_COUNT_TRUNCATED is used for
> optimizing away the and early. We then rely on the compiler not
> assuming anything on the value. Like if you'd do that on GIMPLE
> VRP would come along and second-guess you because the shift
> value may not be too large. This combine issue sounds very similar.
>
> So I'm suggesting again to instead provide patterns that
> match (shft A (and B cst))
I found a message from 2013 that talks about this.
https://gcc.gnu.org/ml/gcc-patches/2013-11/msg00169.html
I can try looking at this.
I'd question the timing though. I don't think that trying to rewrite
shift patterns in the RISC-V port at this point in the release process
is a good idea. I think we should fix the combine bug now with a
simple patch, and try reworking the shift support after the gcc-8
release.
Jim
