In rare situations, pa_emit_move_sequence needs to handle a paradoxical SUBREG in a floating-point load or store.  There is existing code to adjust the operand's address but we fail to emit the reload if we don't need to load the address to a register.  We just
fall through pa_emit_move_sequence and emit the original operand.

This patch revises the handling of these reloads to always  emit the reload with the
adjusted operand.

Tested on hppa-unknown-linux-gnu and hppa64-hp-hpux11.11.  Committed to trunk.

Dave

--
John David Anglin  dave.ang...@bell.net

2018-03-14  John David Anglin  <dang...@gcc.gnu.org>

        PR target/83451
        * config/pa/pa.c (pa_emit_move_sequence):  Always emit secondary reload
        insn for floating-point loads and stores.

Index: config/pa/pa.c
===================================================================
--- config/pa/pa.c      (revision 258420)
+++ config/pa/pa.c      (working copy)
@@ -1750,9 +1750,7 @@
                }
              else
                emit_move_insn (scratch_reg, XEXP (op1, 0));
-             emit_insn (gen_rtx_SET (operand0,
-                                 replace_equiv_address (op1, scratch_reg)));
-             return 1;
+             op1 = replace_equiv_address (op1, scratch_reg);
            }
        }
       else if ((!INT14_OK_STRICT && symbolic_memory_operand (op1, VOIDmode))
@@ -1762,10 +1760,10 @@
          /* Load memory address into SCRATCH_REG.  */
          scratch_reg = force_mode (word_mode, scratch_reg);
          emit_move_insn (scratch_reg, XEXP (op1, 0));
-         emit_insn (gen_rtx_SET (operand0,
-                                 replace_equiv_address (op1, scratch_reg)));
-         return 1;
+         op1 = replace_equiv_address (op1, scratch_reg);
        }
+      emit_insn (gen_rtx_SET (operand0, op1));
+      return 1;
     }
   else if (scratch_reg
           && FP_REG_P (operand1)
@@ -1803,9 +1801,7 @@
                }
              else
                emit_move_insn (scratch_reg, XEXP (op0, 0));
-             emit_insn (gen_rtx_SET (replace_equiv_address (op0, scratch_reg),
-                                     operand1));
-             return 1;
+             op0 = replace_equiv_address (op0, scratch_reg);
            }
        }
       else if ((!INT14_OK_STRICT && symbolic_memory_operand (op0, VOIDmode))
@@ -1815,10 +1811,10 @@
          /* Load memory address into SCRATCH_REG.  */
          scratch_reg = force_mode (word_mode, scratch_reg);
          emit_move_insn (scratch_reg, XEXP (op0, 0));
-         emit_insn (gen_rtx_SET (replace_equiv_address (op0, scratch_reg),
-                                 operand1));
-         return 1;
+         op0 = replace_equiv_address (op0, scratch_reg);
        }
+      emit_insn (gen_rtx_SET (op0, operand1));
+      return 1;
     }
   /* Handle secondary reloads for loads of FP registers from constant
      expressions by forcing the constant into memory.  For the most part,

Reply via email to