GCC Maintainers:
The following patch fixes an ICE when compiling the test case
gcc -mcpu=power7 builtin-fctid-fctiw-runnable.c
The GCC compiler now gives a message
"error: builtin function ‘__builtin_fctiw’ requires the ‘-mpower8-vector’
option"
and exits without generating an internal error.
The patch has been tested by compiling by hand as given above. The
regression testing has also been done on
powerpc64-unknown-linux-gnu (Power 8 BE)
powerpc64le-unknown-linux-gnu (Power 8 LE)
powerpc64le-unknown-linux-gnu (Power 9 LE)
with no regressions.
Let me know if the patch looks OK or not. Thanks.
Carl Love
-------------------------------------------------------------
gcc/ChangeLog:
2018-03-13 Carl Love <c...@us.ibm.com>
PR 84422 - ICE on various builtin test functions when compiled with
-mcpu=power7.
* config/rs6000/rs6000-builtin.def: Change macro expansion for FCTID,
FCTIW to BU_P8V_MISC_1.
---
gcc/config/rs6000/rs6000-builtin.def | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.def
b/gcc/config/rs6000/rs6000-builtin.def
index 9942d65..6e6dab0 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -658,6 +658,14 @@
/* Miscellaneous builtins for instructions added in ISA 2.07. These
instructions do require the ISA 2.07 vector support, but they aren't vector
instructions. */
+#define BU_P8V_MISC_1(ENUM, NAME, ATTR, ICODE) \
+ RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
+ "__builtin_" NAME, /* NAME */ \
+ RS6000_BTM_P8_VECTOR, /* MASK */ \
+ (RS6000_BTC_ ## ATTR /* ATTR */ \
+ | RS6000_BTC_UNARY), \
+ CODE_FOR_ ## ICODE) /* ICODE */
+
#define BU_P8V_MISC_3(ENUM, NAME, ATTR, ICODE) \
RS6000_BUILTIN_3 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
"__builtin_" NAME, /* NAME */ \
@@ -1881,8 +1889,8 @@ BU_VSX_OVERLOAD_X (XST, "xst")
BU_VSX_OVERLOAD_X (XST_BE, "xst_be")
/* 1 argument builtins pre ISA 2.04. */
-BU_FP_MISC_1 (FCTID, "fctid", CONST, lrintdfdi2)
-BU_FP_MISC_1 (FCTIW, "fctiw", CONST, lrintsfsi2)
+BU_P8V_MISC_1 (FCTID, "fctid", CONST, lrintdfdi2)
+BU_P8V_MISC_1 (FCTIW, "fctiw", CONST, lrintsfsi2)
/* 2 argument CMPB instructions added in ISA 2.05. */
BU_P6_2 (CMPB_32, "cmpb_32", CONST, cmpbsi3)
--
2.7.4
