I have committed this patch to suppress some more irrelevant options
from the output of "gcc --target-help" for the powerpcspe backend.
I have tested this by rebuilding GCC and checking the output of "gcc
--target-help".
2018-02-02 Andrew Jenner <and...@codesourcery.com>
* config/powerpcspe/powerpcspe.opt: (msimple-fpu, mfpu) Add
Undocumented.
* config/powerpcspe/sysv4.opt (mbit-align): Likewise.
Index: gcc/config/powerpcspe/powerpcspe.opt
===================================================================
--- gcc/config/powerpcspe/powerpcspe.opt (revision 257416)
+++ gcc/config/powerpcspe/powerpcspe.opt (working copy)
@@ -516,11 +516,11 @@ Target RejectNegative Var(rs6000_double_
Double-precision floating point unit.
msimple-fpu
-Target RejectNegative Var(rs6000_simple_fpu) Save
+Target Undocumented RejectNegative Var(rs6000_simple_fpu) Save
Floating point unit does not support divide & sqrt.
mfpu=
-Target RejectNegative Joined Enum(fpu_type_t) Var(rs6000_fpu_type)
Init(FPU_NONE)
+Target Undocumented RejectNegative Joined Enum(fpu_type_t)
Var(rs6000_fpu_type) Init(FPU_NONE)
-mfpu= Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu).
Enum
Index: gcc/config/powerpcspe/sysv4.opt
===================================================================
--- gcc/config/powerpcspe/sysv4.opt (revision 257416)
+++ gcc/config/powerpcspe/sysv4.opt (working copy)
@@ -44,7 +44,7 @@ EnumValue
Enum(rs6000_tls_size) String(64) Value(64)
mbit-align
-Target Report Var(TARGET_NO_BITFIELD_TYPE) Save
+Target Undocumented Report Var(TARGET_NO_BITFIELD_TYPE) Save
Align to the base type of the bit-field.
mstrict-align
