Hi All,
This patch silences the warnings that were emitted when certain ACLE macros
were being redefined
when using the new target pragma or attribute to change architecture level.
It also keeps better track of which arch directives have already been emitted.
This allows special
cases that existed before to keep working as they did before.
Regtested on arm-none-eabi and no regressions.
Bootstrapped and regtested on arm-none-Linux-gnueabihf and no issues.
Ok for trunk and backport to the GCC-8 branch?
Thanks,
Tamar
gcc/
2018-02-05 Tamar Christina <tamar.christ...@arm.com>
PR target/82641
* config/arm/arm.c (arm_print_asm_arch_directives): Record already
emitted arch directives.
* config/arm/arm-c.c (arm_cpu_builtins): Undefine __ARM_ARCH and
__ARM_FEATURE_COPROC before changing architectures.
gcc/testsuite
2018-02-05 Tamar Christina <tamar.christ...@arm.com>
PR target/82641
* gcc.target/arm/pragma_arch_switch_2.c: New.
--
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 486cbd132974aba6ac12fa221ed7322d8d54039d..9a16172f1d8af1a2fb3f24b758650e16ff6e810a 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -113,7 +113,10 @@ arm_cpu_builtins (struct cpp_reader* pfile)
consistency with armcc. */
builtin_define ("__arm__");
if (TARGET_ARM_ARCH)
- builtin_define_with_int_value ("__ARM_ARCH", TARGET_ARM_ARCH);
+ {
+ cpp_undef (pfile, "__ARM_ARCH");
+ builtin_define_with_int_value ("__ARM_ARCH", TARGET_ARM_ARCH);
+ }
if (arm_arch_notm)
builtin_define ("__ARM_ARCH_ISA_ARM");
builtin_define ("__APCS_32__");
@@ -204,6 +207,7 @@ arm_cpu_builtins (struct cpp_reader* pfile)
def_or_undef_macro (pfile, "__ARM_ASM_SYNTAX_UNIFIED__", inline_asm_unified);
+ cpp_undef (pfile, "__ARM_FEATURE_COPROC");
if (TARGET_32BIT && arm_arch4 && !(arm_arch8 && arm_arch_notm))
{
int coproc_level = 0x1;
@@ -217,8 +221,6 @@ arm_cpu_builtins (struct cpp_reader* pfile)
builtin_define_with_int_value ("__ARM_FEATURE_COPROC", coproc_level);
}
- else
- cpp_undef (pfile, "__ARM_FEATURE_COPROC");
}
void
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 978c44af327b6769c161eeee20ca08300e41d033..17feba46619c2ff729ec81520b516fb616ffcb11 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -78,6 +78,10 @@
typedef struct minipool_node Mnode;
typedef struct minipool_fixup Mfix;
+/* The last .arch and .fpu assembly strings that we printed. */
+static std::string arm_last_printed_arch_string;
+static std::string arm_last_printed_fpu_string;
+
void (*arm_lang_output_object_attributes_hook)(void);
struct four_ints
@@ -26390,6 +26394,7 @@ arm_print_asm_arch_directives ()
gcc_assert (arch);
asm_fprintf (asm_out_file, "\t.arch %s\n", arm_active_target.arch_name);
+ arm_last_printed_arch_string = arm_active_target.arch_name;
if (!arch->common.extensions)
return;
@@ -26437,13 +26442,17 @@ arm_file_start (void)
asm_fprintf (asm_out_file, "\t.arch_extension idiv\n");
asm_fprintf (asm_out_file, "\t.arch_extension sec\n");
asm_fprintf (asm_out_file, "\t.arch_extension mp\n");
+ arm_last_printed_arch_string = "armv7ve";
}
else
arm_print_asm_arch_directives ();
}
else if (strncmp (arm_active_target.core_name, "generic", 7) == 0)
- asm_fprintf (asm_out_file, "\t.arch %s\n",
- arm_active_target.core_name + 8);
+ {
+ asm_fprintf (asm_out_file, "\t.arch %s\n",
+ arm_active_target.core_name + 8);
+ arm_last_printed_arch_string = arm_active_target.core_name + 8;
+ }
else
{
const char* truncated_name
@@ -30934,10 +30943,6 @@ arm_identify_fpu_from_isa (sbitmap isa)
gcc_unreachable ();
}
-/* The last .arch and .fpu assembly strings that we printed. */
-static std::string arm_last_printed_arch_string;
-static std::string arm_last_printed_fpu_string;
-
/* Implement ASM_DECLARE_FUNCTION_NAME. Output the ISA features used
by the function fndecl. */
void
diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
new file mode 100644
index 0000000000000000000000000000000000000000..fe52191c32c037fe4096c1884e1f6397318bd6a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c
@@ -0,0 +1,17 @@
+/* Test for switching architectures during compilation. */
+/* { dg-skip-if "instruction not valid on thumb" { *-*-* } { "-mthumb" } { "" } } */
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-additional-options "-Wall -O2 -march=armv4t -std=gnu99 -marm" } */
+
+#pragma GCC target ("arch=armv5te")
+void cpu_has_iwmmxt (void)
+{
+ int lo;
+ int hi;
+ __asm__ __volatile__ (
+ "mcrr p0, 0, %2, %3, c0\n"
+ : "=r" (lo), "=r" (hi)
+ : "r" (0), "r" (0x100));
+}
+
