On Tue, Jan 16, 2018 at 02:21:30PM +0000, Tamar Christina wrote:
> Hi Kyrill,
>
> >
> > xgene1 was added a few releases ago, better to use one of the new additions
> > from the above list.
> > For example -mtune=cortex-r52.
>
> Thanks, I have updated the patch. I'll wait for an ok from an AArch64
> maintainer and a Docs maintainer.
OK. But you have the same issue in the AArch64 part.
James
> Index: htdocs/gcc-8/changes.html
> ===================================================================
> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-8/changes.html,v
> retrieving revision 1.26
> diff -u -r1.26 changes.html
> --- htdocs/gcc-8/changes.html 11 Jan 2018 09:31:53 -0000 1.26
> +++ htdocs/gcc-8/changes.html 16 Jan 2018 14:12:57 -0000
> @@ -147,7 +147,51 @@
>
> <h3 id="aarch64">AArch64</h3>
> <ul>
> - <li></li>
> + <li>
> + The Armv8.4-A architecture is now supported. It can be used by
> + specifying the <code>-march=armv8.4-a</code> option.
> + </li>
> + <li>
> + The Dot Product instructions are now supported as an optional extension
> to the
> + Armv8.2-A architecture and newer and are mandatory on Armv8.4-A. The
> extension can be used by
> + specifying the <code>+dotprod</code> architecture extension. E.g.
> <code>-march=armv8.2-a+dotprod</code>.
> + </li>
> + <li>
> + The Armv8-A <code>+crypto</code> extension has now been split into two
> extensions for finer grained control:
> + <ul>
> + <li><code>+aes</code> which contains the Armv8-A AES crytographic
> instructions.</li>
> + <li><code>+sha2</code> which contains the Armv8-A SHA2 and SHA1
> cryptographic instructions.</li>
> + </ul>
> + Using <code>+crypto<code> will now enable these two extensions.
> + </li>
> + <li>
> + New Armv8.4-A FP16 Floating Point Multiplication Variant instructions
> have been added. These instructions are
> + mandatory in Armv8.4-A but available as an optional extension to
> Armv8.2-A and Armv8.3-A. The new extension
> + can be used by specifying the <code>+fp16fml</code> architectural
> extension on Armv8.2-A and Armv8.3-A. On Armv8.4-A
> + the instructions can be enabled by specifying <code>+fp16</code>.
> + </li>
> + <li>
> + New cryptographic instructions have been added as optional extensions to
> Armv8.2-A and newer. These instructions can
> + be enabled with:
> + <ul>
> + <li><code>+sha3</code> New SHA3 and SHA2 instructions from Armv8.4-A.
> This implies <code>+sha2</code>.
> + <li><code>+sm4</code> New SM3 and SM4 instructions from Armv8.4-A.
> + </ul>
> + </li>
> + <li>
> + Support has been added for the following processors
> + (GCC identifiers in parentheses):
> + <ul>
> + <li>Arm Cortex-A75 (<code>cortex-a75</code>).</li>
> + <li>Arm Cortex-A55 (<code>cortex-a55</code>).</li>
> + <li>Arm Cortex-A55/Cortex-A75 DynamIQ big.LITTLE
> (<code>cortex-a75.cortex-a55</code>).</li>
> + </ul>
> + The GCC identifiers can be used
> + as arguments to the <code>-mcpu</code> or <code>-mtune</code> options,
> + for example: <code>-mcpu=cortex-a75</code> or
> + <code>-mtune=thunderx2t99p1</code> or as arguments to the equivalent
> target
> + attributes and pragmas.
> + </li>
> </ul>
>
> <h3 id="arm">ARM</h3>
> @@ -169,14 +213,58 @@
> removed in a future release.
> </li>
> <li>
> - The default link behavior for ARMv6 and ARMv7-R targets has been
> + The default link behavior for Armv6 and Armv7-R targets has been
> changed to produce BE8 format when generating big-endian images. A new
> flag <code>-mbe32</code> can be used to force the linker to produce
> legacy BE32 format images. There is no change of behavior for
> - ARMv6-m and other ARMv7 or later targets: these already defaulted
> + Armv6-M and other Armv7 or later targets: these already defaulted
> to BE8 format. This change brings GCC into alignment with other
> compilers for the ARM architecture.
> </li>
> + <li>
> + The Armv8-R architecture is now supported. It can be used by specifying
> the
> + <code>-march=armv8-r</code> option.
> + </li>
> + <li>
> + The Armv8.3-A architecture is now supported. It can be used by
> + specifying the <code>-march=armv8.3-a</code> option.
> + </li>
> + <li>
> + The Armv8.4-A architecture is now supported. It can be used by
> + specifying the <code>-march=armv8.4-a</code> option.
> + </li>
> + <li>
> + The Dot Product instructions are now supported as an optional extension
> to the
> + Armv8.2-A architecture and newer and are mandatory on Armv8.4-A. The
> extension can be used by
> + specifying the <code>+dotprod</code> architecture extension. E.g.
> <code>-march=armv8.2-a+dotprod</code>.
> + </li>
> +
> + <li>
> + Support for setting extensions and architectures using the GCC target
> pragma and attribute has been added.
> + It can be used by specifying <code>#pragma GCC target
> ("arch=...")</code>, <code>#pragma GCC target ("+extension")</code>,
> + <code>__attribute__((target("arch=...")))</code> or
> <code>__attribute__((target("+extension")))</code>.
> + </li>
> + <li>
> + New Armv8.4-A FP16 Floating Point Multiplication Variant instructions
> have been added. These instructions are
> + mandatory in Armv8.4-A but available as an optional extension to
> Armv8.2-A and Armv8.3-A. The new extension
> + can be used by specifying the <code>+fp16fml</code> architectural
> extension on Armv8.2-A and Armv8.3-A. On Armv8.4-A
> + the instructions can be enabled by specifying <code>+fp16</code>.
> + </li>
> + <li>
> + Support has been added for the following processors
> + (GCC identifiers in parentheses):
> + <ul>
> + <li>Arm Cortex-A75 (<code>cortex-a75</code>).</li>
> + <li>Arm Cortex-A55 (<code>cortex-a55</code>).</li>
> + <li>Arm Cortex-A55/Cortex-A75 DynamIQ big.LITTLE
> (<code>cortex-a75.cortex-a55</code>).</li>
> + <li>Arm Cortex-R52 for Armv8-R (<code>cortex-r52</code>).</li>
> + </ul>
> + The GCC identifiers can be used
> + as arguments to the <code>-mcpu</code> or <code>-mtune</code> options,
> + for example: <code>-mcpu=cortex-a75</code> or
> + <code>-mtune=cortex-r52</code> or as arguments to the equivalent
> target
> + attributes and pragmas.
> + </li>
> </ul>
>
> <h3 id="avr">AVR</h3>
>
