Hi,
This patch adds a pattern for "ori 31,31,0" as a speculation barrier, and
an associated built-in function. This is currently restricted to Power7
and later. Documentation and test included.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is
this okay for trunk?
Thanks,
Bill
[gcc]
2018-01-11 Bill Schmidt <wschm...@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
(SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
* config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
MISC_BUILTIN_SPEC_BARRIER.
(rs6000_init_builtins): Likewise.
* config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
enum value.
(speculation_barrier): New define_insn.
* doc/extend.texi: Document __builtin_speculation_barrier.
[gcc/testsuite]
2018-01-11 Bill Schmidt <wschm...@linux.vnet.ibm.com>
* gcc.target/powerpc/spec-barr-1.c: New file.
Index: gcc/config/rs6000/rs6000-builtin.def
===================================================================
--- gcc/config/rs6000/rs6000-builtin.def (revision 256364)
+++ gcc/config/rs6000/rs6000-builtin.def (working copy)
@@ -638,7 +638,15 @@
| RS6000_BTC_BINARY), \
CODE_FOR_ ## ICODE) /* ICODE */
+#define BU_P7_MISC_X(ENUM, NAME, ATTR) \
+ RS6000_BUILTIN_X (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
+ "__builtin_" NAME, /* NAME */ \
+ RS6000_BTM_POPCNTD, /* MASK */ \
+ (RS6000_BTC_ ## ATTR /* ATTR */ \
+ | RS6000_BTC_SPECIAL), \
+ CODE_FOR_nothing) /* ICODE */
+
/* Miscellaneous builtins for instructions added in ISA 2.07. These
instructions do require the ISA 2.07 vector support, but they aren't vector
instructions. */
@@ -2317,6 +2325,11 @@ BU_DFP_MISC_2 (DSCLIQ, "dscliq", CONST,
dfp_dscli
BU_DFP_MISC_2 (DSCRI, "dscri", CONST, dfp_dscri_dd)
BU_DFP_MISC_2 (DSCRIQ, "dscriq", CONST, dfp_dscri_td)
+/* 0 argument void function that we pretend was added in ISA 2.06.
+ It's a special nop recognized by 2018+ firmware for P7 and up,
+ with speculation barrier semantics. */
+BU_P7_MISC_X (SPEC_BARRIER, "speculation_barrier", MISC)
+
/* 1 argument BCD functions added in ISA 2.06. */
BU_P7_MISC_1 (CDTBCD, "cdtbcd", CONST, cdtbcd)
BU_P7_MISC_1 (CBCDTD, "cbcdtd", CONST, cbcdtd)
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 256364)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -16792,6 +16792,12 @@ rs6000_expand_builtin (tree exp, rtx target, rtx s
case RS6000_BUILTIN_CPU_SUPPORTS:
return cpu_expand_builtin (fcode, exp, target);
+ case MISC_BUILTIN_SPEC_BARRIER:
+ {
+ emit_insn (gen_speculation_barrier ());
+ return NULL_RTX;
+ }
+
case ALTIVEC_BUILTIN_MASK_FOR_LOAD:
case ALTIVEC_BUILTIN_MASK_FOR_STORE:
{
@@ -17164,6 +17170,8 @@ rs6000_init_builtins (void)
ftype = build_function_type_list (void_type_node, NULL_TREE);
def_builtin ("__builtin_cpu_init", ftype, RS6000_BUILTIN_CPU_INIT);
+ def_builtin ("__builtin_speculation_barrier", ftype,
+ MISC_BUILTIN_SPEC_BARRIER);
ftype = build_function_type_list (bool_int_type_node, const_ptr_type_node,
NULL_TREE);
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 256364)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -168,6 +168,7 @@
UNSPECV_MFFS ; Move from FPSCR
UNSPECV_MTFSF ; Move to FPSCR Fields
UNSPECV_SPLIT_STACK_RETURN ; A camouflaged return
+ UNSPECV_SPEC_BARRIER ; Speculation barrier
])
@@ -12990,6 +12991,11 @@
return "ori 1,1,0";
return "ori 2,2,0";
})
+
+(define_insn "speculation_barrier"
+ [(unspec_volatile:BLK [(const_int 0)] UNSPECV_SPEC_BARRIER)]
+ ""
+ "ori 31,31,0")
;; Define the subtract-one-and-jump insns, starting with the template
;; so loop.c knows what to generate.
Index: gcc/doc/extend.texi
===================================================================
--- gcc/doc/extend.texi (revision 256364)
+++ gcc/doc/extend.texi (working copy)
@@ -15734,6 +15734,7 @@ unsigned long __builtin_divdeuo (unsigned long, un
unsigned int cdtbcd (unsigned int);
unsigned int cbcdtd (unsigned int);
unsigned int addg6s (unsigned int, unsigned int);
+void __builtin_speculation_barrier ();
@end smallexample
The @code{__builtin_divde}, @code{__builtin_divdeo},
Index: gcc/testsuite/gcc.target/powerpc/spec-barr-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/spec-barr-1.c (nonexistent)
+++ gcc/testsuite/gcc.target/powerpc/spec-barr-1.c (working copy)
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } {
"-mcpu=power7" } } */
+/* { dg-options "-mcpu=power7" } */
+
+void foo ()
+{
+ __builtin_speculation_barrier ();
+}
+
+/* { dg-final { scan-assembler "ori 31,31,0" } } */
