On 09/01/18 18:00, Richard Earnshaw (lists) wrote: > On 09/01/18 17:57, Bernd Edlinger wrote: >> On 01/09/18 18:50, Richard Earnshaw (lists) wrote: >>> On 09/01/18 17:36, Bernd Edlinger wrote: >>>> Richard Earnshaw wrote: >>>> > Let me give an example, we use the generic code expansion if we >>>> > encounter the builtin when generating code for Thumb on pre-ARMv7 >>>> > devices. We don't have instructions in 'thumb1' to guard against >>>> > speculation and we really want to warn users that they've done this (it >>>> > might be a mistake in how they're invoking the compiler). >>>> >>>> Instead of this warning in one of the unsupported cases, could you use >>>> the DSB SYS + ISB barrier as the white paper suggests? >>>> >>>> >>>> Bernd. >>> >>> Thumb1 doesn't have those instructions. >>> >> >> Ah, well, and in the case mode == TImode ? >> >> Bernd. > > I don't think we can ever get a TImode integral type on AArch32. > Perhaps we should just ICE in that case... > > R.
But we probably don't need to. int x __attribute__((mode(TI))) = 0; $ arm-none-elf-gcc timode.c /tmp/ti.c:1:1: error: unable to emulate ‘TI’ int x __attribute__((mode(TI))) = 0; ^~~
