On Wed, Dec 20, 2017 at 8:37 PM, Jakub Jelinek <ja...@redhat.com> wrote:
> Hi!
>
> As you know, we ran out of ix86_isa_flags bitmask bits some time ago.
> The testcase from the PR's #c0 (which I'm not adding into testsuite, because
> it will be useless any time *.opt is modified with any of the
> OPTION_MASK_ISA* bits) ICEs because we mix in i386-builtins.def
> OPTION_MASK_ISA_* constants from the two bitmasks together,
> e.g.
> OPTION_MASK_ISA_SHSTK | OPTION_MASK_ISA_64BIT
> and we have just a single bitmask there, so depending on the BDESC_
> chunk it must be either solely ix86_isa_flags or solely ix86_isa_flags2,
> otherwise OPTION_MASK_ISA_64BIT:
> #define OPTION_MASK_ISA_64BIT (HOST_WIDE_INT_1U << 1)
> stands for
> #define OPTION_MASK_ISA_AVX5124VNNIW (HOST_WIDE_INT_1U << 1)
> instead.
> I've grepped around quite a bit and determined the only problematic two
> OPTION_MASK_ISA_* options right now are OPTION_MASK_ISA_SHSTK due
> to being ored with OPTION_MASK_ISA_64BIT and
> OPTION_MASK_ISA_AVX512VBMI2 due to being ored with OPTION_MASK_ISA_AVX512VL.
>
> So, this patch moves those 2 OPTION_MASK_ISA* flags into ix86_isa_flags
> and to free some room there, moves 4 other OPTION_MASK_ISA* flags that
> are never ored in any way and have very few dependencies into
> ix86_isa_flags2.
>
> In addition to this, it fixes a bug where for -mavx512vbmi2
> we properly enable -mavx512f, but for -mavx512vbmi2 -mno-avx512f
> we keep -mavx512vbmi2 enabled while -mavx512f disabled, so things ICE badly.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
> As I said in the PR, one way to perhaps improve incrementally the status
> quo could be to encode explicitly whether it is a mask option for
> ix86_isa_flags or ix86_isa_flags2 in the OPTION_MASK_ISA* name, e.g. by
> using OPTION_MASK_ISA2_<whatever> for the latter. Thoughts on that?
>
> And, while we now have 4 bits left, if we keep adding new ISA bits at the
> current rate, while there are still a few ISA flags that could be moved,
> perhaps at some point it might be easier to move everything AVX512 related
> to ix86_isa_flags and keep the rest in ix86_isa_flags. For that we'd need
> some magic shadow option for OPTION_MASK_ISA_64BIT and keep that
> synchronized.
>
> 2017-12-20 Jakub Jelinek <ja...@redhat.com>
>
> PR target/83488
> * config/i386/i386.c (ix86_target_string): Move -mavx512vbmi2 and
> -mshstk entries from isa_opts2 to isa_opts and -mhle, -mmovbe,
> -mclzero and -mmwaitx entries from isa_opts to isa_opts2.
> (ix86_option_override_internal): Adjust for
> OPTION_MASK_ISA_{HLE,MOVBE,CLZERO,MWAITX} moving to ix86_isa_flags2
> and OPTION_MASK_ISA_SHSTK moving to ix86_isa_flags.
> (BDESC_VERIFYS): Remove SPECIAL_ARGS2 related checks.
> (ix86_init_mmx_sse_builtins): Remove bdesc_special_args2 handling.
> Use def_builtin2 instead of def_builtin for OPTION_MASK_ISA_MWAITX
> and OPTION_MASK_ISA_CLZERO builtins. Use def_builtin instead of
> def_builtin2 for CET builtins.
> (ix86_expand_builtin): Remove bdesc_special_args2 handling. Fix
> up formatting in IX86_BUILTIN_RDPID code.
> * config/i386/i386-builtin.def: Move VBMI2 builtins from SPECIAL_ARGS2
> section to SPECIAL_ARGS and from ARGS2 section to ARGS.
> * config/i386/i386.opt (mavx512vbmi2, mshstk): Move from
> ix86_isa_flags2 to ix86_isa_flags.
> (mhle, mmovbe, mclzero, mmwaitx): Move from ix86_isa_flags to
> ix86_isa_flags2.
> * config/i386/i386-c.c (ix86_target_macros_internal): Check for
> OPTION_MASK_ISA_{CLZERO,MWAITX} in isa_flag2 instead of isa_flag.
> Check for OPTION_MASK_ISA_{SHSTK,AVX512VBMI2} in isa_flag instead
> of isa_flag2.
> * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VBMI2_SET):
> Or in OPTION_MASK_ISA_AVX512F_SET.
> (OPTION_MASK_ISA_AVX512F_UNSET): Or in
> OPTION_MASK_ISA_AVX512VBMI2_UNSET.
> (ix86_handle_option): Adjust for
> OPTION_MASK_ISA_{SHSTK,AVX512VBMI2}_*SET being in ix86_isa_flags
> and OPTION_MASK_ISA_{MOVBE,MWAITX,CLZERO}_*SET in ix86_isa_flags2.
>
> * gcc.target/i386/pr83488.c: New test.
LGTM.
Thanks,
Uros.
> --- gcc/config/i386/i386.c.jj 2017-12-20 10:10:10.000000000 +0100
> +++ gcc/config/i386/i386.c 2017-12-20 13:15:46.738245880 +0100
> @@ -2753,21 +2753,24 @@ ix86_target_string (HOST_WIDE_INT isa, H
> {
> { "-mcx16", OPTION_MASK_ISA_CX16 },
> { "-mmpx", OPTION_MASK_ISA_MPX },
> - { "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 },
> - { "-mavx512vnni", OPTION_MASK_ISA_AVX512VNNI },
> + { "-mavx512vnni", OPTION_MASK_ISA_AVX512VNNI },
> { "-mvaes", OPTION_MASK_ISA_VAES },
> { "-mrdpid", OPTION_MASK_ISA_RDPID },
> { "-msgx", OPTION_MASK_ISA_SGX },
> { "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW },
> { "-mavx5124fmaps", OPTION_MASK_ISA_AVX5124FMAPS },
> { "-mavx512vpopcntdq", OPTION_MASK_ISA_AVX512VPOPCNTDQ },
> - { "-mibt", OPTION_MASK_ISA_IBT },
> - { "-mshstk", OPTION_MASK_ISA_SHSTK }
> + { "-mibt", OPTION_MASK_ISA_IBT },
> + { "-mhle", OPTION_MASK_ISA_HLE },
> + { "-mmovbe", OPTION_MASK_ISA_MOVBE },
> + { "-mclzero", OPTION_MASK_ISA_CLZERO },
> + { "-mmwaitx", OPTION_MASK_ISA_MWAITX }
> };
> static struct ix86_target_opts isa_opts[] =
> {
> { "-mvpclmulqdq", OPTION_MASK_ISA_VPCLMULQDQ },
> { "-mgfni", OPTION_MASK_ISA_GFNI },
> + { "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 },
> { "-mavx512vbmi", OPTION_MASK_ISA_AVX512VBMI },
> { "-mavx512ifma", OPTION_MASK_ISA_AVX512IFMA },
> { "-mavx512vl", OPTION_MASK_ISA_AVX512VL },
> @@ -2814,17 +2817,14 @@ ix86_target_string (HOST_WIDE_INT isa, H
> { "-mtbm", OPTION_MASK_ISA_TBM },
> { "-mpopcnt", OPTION_MASK_ISA_POPCNT },
> { "-msahf", OPTION_MASK_ISA_SAHF },
> - { "-mmovbe", OPTION_MASK_ISA_MOVBE },
> { "-mcrc32", OPTION_MASK_ISA_CRC32 },
> { "-mfsgsbase", OPTION_MASK_ISA_FSGSBASE },
> { "-mrdrnd", OPTION_MASK_ISA_RDRND },
> - { "-mmwaitx", OPTION_MASK_ISA_MWAITX },
> - { "-mclzero", OPTION_MASK_ISA_CLZERO },
> { "-mpku", OPTION_MASK_ISA_PKU },
> { "-mlwp", OPTION_MASK_ISA_LWP },
> - { "-mhle", OPTION_MASK_ISA_HLE },
> { "-mfxsr", OPTION_MASK_ISA_FXSR },
> - { "-mclwb", OPTION_MASK_ISA_CLWB }
> + { "-mclwb", OPTION_MASK_ISA_CLWB },
> + { "-mshstk", OPTION_MASK_ISA_SHSTK }
> };
>
> /* Flag options. */
> @@ -4009,8 +4009,8 @@ ix86_option_override_internal (bool main
> && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SAHF))
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SAHF;
> if (processor_alias_table[i].flags & PTA_MOVBE
> - && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MOVBE))
> - opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MOVBE;
> + && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_MOVBE))
> + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_MOVBE;
> if (processor_alias_table[i].flags & PTA_AES
> && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_AES))
> ix86_isa_flags |= OPTION_MASK_ISA_AES;
> @@ -4033,8 +4033,8 @@ ix86_option_override_internal (bool main
> && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RTM))
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RTM;
> if (processor_alias_table[i].flags & PTA_HLE
> - && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_HLE))
> - opts->x_ix86_isa_flags |= OPTION_MASK_ISA_HLE;
> + && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_HLE))
> + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_HLE;
> if (processor_alias_table[i].flags & PTA_PRFCHW
> && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PRFCHW))
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PRFCHW;
> @@ -4075,8 +4075,8 @@ ix86_option_override_internal (bool main
> && !(opts->x_ix86_isa_flags_explicit &
> OPTION_MASK_ISA_CLFLUSHOPT))
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLFLUSHOPT;
> if (processor_alias_table[i].flags & PTA_CLZERO
> - && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLZERO))
> - opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLZERO;
> + && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_CLZERO))
> + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_CLZERO;
> if (processor_alias_table[i].flags & PTA_XSAVEC
> && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEC))
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEC;
> @@ -4118,8 +4118,8 @@ ix86_option_override_internal (bool main
> if (processor_alias_table[i].flags & (PTA_PREFETCH_SSE | PTA_SSE))
> x86_prefetch_sse = true;
> if (processor_alias_table[i].flags & PTA_MWAITX
> - && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MWAITX))
> - opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MWAITX;
> + && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_MWAITX))
> + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_MWAITX;
> if (processor_alias_table[i].flags & PTA_PKU
> && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PKU))
> opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PKU;
> @@ -4869,7 +4869,7 @@ ix86_option_override_internal (bool main
> if (opts->x_flag_cf_protection != CF_NONE)
> {
> if (!(TARGET_IBT_P (opts->x_ix86_isa_flags2)
> - || TARGET_SHSTK_P (opts->x_ix86_isa_flags2)))
> + || TARGET_SHSTK_P (opts->x_ix86_isa_flags)))
> {
> if (flag_cf_protection == CF_FULL)
> {
> @@ -30196,10 +30196,8 @@ BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND
> IX86_BUILTIN__BDESC_ARGS_LAST, 1);
> BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS2_FIRST,
> IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 1);
> -BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS2_FIRST,
> - IX86_BUILTIN__BDESC_ARGS2_LAST, 1);
> BDESC_VERIFYS (IX86_BUILTIN__BDESC_MPX_FIRST,
> - IX86_BUILTIN__BDESC_SPECIAL_ARGS2_LAST, 1);
> + IX86_BUILTIN__BDESC_ARGS2_LAST, 1);
> BDESC_VERIFYS (IX86_BUILTIN__BDESC_MPX_CONST_FIRST,
> IX86_BUILTIN__BDESC_MPX_LAST, 1);
> BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
> @@ -30270,21 +30268,6 @@ ix86_init_mmx_sse_builtins (void)
> IX86_BUILTIN__BDESC_ARGS2_FIRST,
> ARRAY_SIZE (bdesc_args2) - 1);
>
> - for (i = 0, d = bdesc_special_args2;
> - i < ARRAY_SIZE (bdesc_special_args2);
> - i++, d++)
> - {
> - BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_SPECIAL_ARGS2_FIRST, i);
> - if (d->name == 0)
> - continue;
> -
> - ftype = (enum ix86_builtin_func_type) d->flag;
> - def_builtin2 (d->mask, d->name, ftype, d->code);
> - }
> - BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS2_LAST,
> - IX86_BUILTIN__BDESC_SPECIAL_ARGS2_FIRST,
> - ARRAY_SIZE (bdesc_special_args2) - 1);
> -
> /* Add all builtins with rounding. */
> for (i = 0, d = bdesc_round_args;
> i < ARRAY_SIZE (bdesc_round_args);
> @@ -30873,14 +30856,14 @@ ix86_init_mmx_sse_builtins (void)
> VOID_FTYPE_PCVOID, IX86_BUILTIN_CLWB);
>
> /* MONITORX and MWAITX. */
> - def_builtin (OPTION_MASK_ISA_MWAITX, "__builtin_ia32_monitorx",
> - VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITORX);
> - def_builtin (OPTION_MASK_ISA_MWAITX, "__builtin_ia32_mwaitx",
> - VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAITX);
> + def_builtin2 (OPTION_MASK_ISA_MWAITX, "__builtin_ia32_monitorx",
> + VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITORX);
> + def_builtin2 (OPTION_MASK_ISA_MWAITX, "__builtin_ia32_mwaitx",
> + VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAITX);
>
> /* CLZERO. */
> - def_builtin (OPTION_MASK_ISA_CLZERO, "__builtin_ia32_clzero",
> - VOID_FTYPE_PCVOID, IX86_BUILTIN_CLZERO);
> + def_builtin2 (OPTION_MASK_ISA_CLZERO, "__builtin_ia32_clzero",
> + VOID_FTYPE_PCVOID, IX86_BUILTIN_CLZERO);
>
> /* Add FMA4 multi-arg argument instructions */
> for (i = 0, d = bdesc_multi_arg; i < ARRAY_SIZE (bdesc_multi_arg); i++,
> d++)
> @@ -30904,7 +30887,7 @@ ix86_init_mmx_sse_builtins (void)
> continue;
>
> ftype = (enum ix86_builtin_func_type) d->flag;
> - def_builtin2 (d->mask, d->name, ftype, d->code);
> + def_builtin (d->mask, d->name, ftype, d->code);
> }
> BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_LAST,
> IX86_BUILTIN__BDESC_CET_FIRST,
> @@ -30919,7 +30902,7 @@ ix86_init_mmx_sse_builtins (void)
> continue;
>
> ftype = (enum ix86_builtin_func_type) d->flag;
> - def_builtin2 (d->mask, d->name, ftype, d->code);
> + def_builtin (d->mask, d->name, ftype, d->code);
> }
> BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_LAST,
> IX86_BUILTIN__BDESC_CET_NORMAL_FIRST,
> @@ -37497,22 +37480,14 @@ s4fma_expand:
> }
> return target;
> }
> - case IX86_BUILTIN_RDPID:
> - return ix86_expand_special_args_builtin (bdesc_args2 + i, exp,
> + case IX86_BUILTIN_RDPID:
> + return ix86_expand_special_args_builtin (bdesc_args2 + i, exp,
> target);
> default:
> return ix86_expand_args_builtin (bdesc_args2 + i, exp, target);
> }
> }
>
> - if (fcode >= IX86_BUILTIN__BDESC_SPECIAL_ARGS2_FIRST
> - && fcode <= IX86_BUILTIN__BDESC_SPECIAL_ARGS2_LAST)
> - {
> - i = fcode - IX86_BUILTIN__BDESC_SPECIAL_ARGS2_FIRST;
> - return ix86_expand_special_args_builtin (bdesc_special_args2 + i, exp,
> - target);
> - }
> -
> if (fcode >= IX86_BUILTIN__BDESC_COMI_FIRST
> && fcode <= IX86_BUILTIN__BDESC_COMI_LAST)
> {
> --- gcc/config/i386/i386-builtin.def.jj 2017-12-20 10:10:10.000000000 +0100
> +++ gcc/config/i386/i386-builtin.def 2017-12-20 13:12:18.770835425 +0100
> @@ -392,6 +392,29 @@ BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FO
> BDESC (OPTION_MASK_ISA_PKU, CODE_FOR_rdpkru, "__builtin_ia32_rdpkru",
> IX86_BUILTIN_RDPKRU, UNKNOWN, (int) UNSIGNED_FTYPE_VOID)
> BDESC (OPTION_MASK_ISA_PKU, CODE_FOR_wrpkru, "__builtin_ia32_wrpkru",
> IX86_BUILTIN_WRPKRU, UNKNOWN, (int) VOID_FTYPE_UNSIGNED)
>
> +/* VBMI2 */
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_compressstorev64qi_mask,
> "__builtin_ia32_compressstoreuqi512_mask", IX86_BUILTIN_PCOMPRESSBSTORE512,
> UNKNOWN, (int) VOID_FTYPE_PV64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_compressstorev32hi_mask,
> "__builtin_ia32_compressstoreuhi512_mask", IX86_BUILTIN_PCOMPRESSWSTORE512,
> UNKNOWN, (int) VOID_FTYPE_PV32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressstorev32qi_mask, "__builtin_ia32_compressstoreuqi256_mask",
> IX86_BUILTIN_PCOMPRESSBSTORE256, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressstorev16qi_mask, "__builtin_ia32_compressstoreuqi128_mask",
> IX86_BUILTIN_PCOMPRESSBSTORE128, UNKNOWN, (int) VOID_FTYPE_PV16QI_V16QI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressstorev16hi_mask, "__builtin_ia32_compressstoreuhi256_mask",
> IX86_BUILTIN_PCOMPRESSWSTORE256, UNKNOWN, (int) VOID_FTYPE_PV16HI_V16HI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressstorev8hi_mask, "__builtin_ia32_compressstoreuhi128_mask",
> IX86_BUILTIN_PCOMPRESSWSTORE128, UNKNOWN, (int) VOID_FTYPE_PV8HI_V8HI_UQI)
> +
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv64qi_mask,
> "__builtin_ia32_expandloadqi512_mask", IX86_BUILTIN_PEXPANDBLOAD512, UNKNOWN,
> (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv64qi_maskz,
> "__builtin_ia32_expandloadqi512_maskz", IX86_BUILTIN_PEXPANDBLOAD512Z,
> UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32hi_mask,
> "__builtin_ia32_expandloadhi512_mask", IX86_BUILTIN_PEXPANDWLOAD512, UNKNOWN,
> (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32hi_maskz,
> "__builtin_ia32_expandloadhi512_maskz", IX86_BUILTIN_PEXPANDWLOAD512Z,
> UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
> +
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32qi_mask,
> "__builtin_ia32_expandloadqi256_mask", IX86_BUILTIN_PEXPANDBLOAD256, UNKNOWN,
> (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32qi_maskz,
> "__builtin_ia32_expandloadqi256_maskz", IX86_BUILTIN_PEXPANDBLOAD256Z,
> UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv16hi_mask,
> "__builtin_ia32_expandloadhi256_mask", IX86_BUILTIN_PEXPANDWLOAD256, UNKNOWN,
> (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv16hi_maskz,
> "__builtin_ia32_expandloadhi256_maskz", IX86_BUILTIN_PEXPANDWLOAD256Z,
> UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
> +
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv16qi_mask,
> "__builtin_ia32_expandloadqi128_mask", IX86_BUILTIN_PEXPANDBLOAD128, UNKNOWN,
> (int) V16QI_FTYPE_PCV16QI_V16QI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv16qi_maskz,
> "__builtin_ia32_expandloadqi128_maskz", IX86_BUILTIN_PEXPANDBLOAD128Z,
> UNKNOWN, (int) V16QI_FTYPE_PCV16QI_V16QI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv8hi_mask,
> "__builtin_ia32_expandloadhi128_mask", IX86_BUILTIN_PEXPANDWLOAD128, UNKNOWN,
> (int) V8HI_FTYPE_PCV8HI_V8HI_UQI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv8hi_maskz,
> "__builtin_ia32_expandloadhi128_maskz", IX86_BUILTIN_PEXPANDWLOAD128Z,
> UNKNOWN, (int) V8HI_FTYPE_PCV8HI_V8HI_UQI)
> +
> BDESC_END (SPECIAL_ARGS, ARGS)
>
> /* Builtins with variable number of arguments. */
> @@ -2394,6 +2417,118 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTI
> BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_avx512vl_vpermi2varv32qi3_mask,
> "__builtin_ia32_vpermi2varqi256_mask", IX86_BUILTIN_VPERMI2VARQI256, UNKNOWN,
> (int) V32QI_FTYPE_V32QI_V32QI_V32QI_USI)
> BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_avx512vl_vpermi2varv16qi3_mask,
> "__builtin_ia32_vpermi2varqi128_mask", IX86_BUILTIN_VPERMI2VARQI128, UNKNOWN,
> (int) V16QI_FTYPE_V16QI_V16QI_V16QI_UHI)
>
> +/* VBMI2 */
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_compressv64qi_mask,
> "__builtin_ia32_compressqi512_mask", IX86_BUILTIN_PCOMPRESSB512, UNKNOWN,
> (int) V64QI_FTYPE_V64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_compressv32hi_mask,
> "__builtin_ia32_compresshi512_mask", IX86_BUILTIN_PCOMPRESSW512, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressv32qi_mask, "__builtin_ia32_compressqi256_mask",
> IX86_BUILTIN_PCOMPRESSB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressv16qi_mask, "__builtin_ia32_compressqi128_mask",
> IX86_BUILTIN_PCOMPRESSB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressv16hi_mask, "__builtin_ia32_compresshi256_mask",
> IX86_BUILTIN_PCOMPRESSW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressv8hi_mask, "__builtin_ia32_compresshi128_mask",
> IX86_BUILTIN_PCOMPRESSW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv64qi_mask,
> "__builtin_ia32_expandqi512_mask", IX86_BUILTIN_PEXPANDB512, UNKNOWN, (int)
> V64QI_FTYPE_V64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv64qi_maskz,
> "__builtin_ia32_expandqi512_maskz", IX86_BUILTIN_PEXPANDB512Z, UNKNOWN, (int)
> V64QI_FTYPE_V64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32hi_mask,
> "__builtin_ia32_expandhi512_mask", IX86_BUILTIN_PEXPANDW512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32hi_maskz,
> "__builtin_ia32_expandhi512_maskz", IX86_BUILTIN_PEXPANDW512Z, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandqi256_mask",
> IX86_BUILTIN_PEXPANDB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandqi256_maskz",
> IX86_BUILTIN_PEXPANDB256Z, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv16qi_mask, "__builtin_ia32_expandqi128_mask",
> IX86_BUILTIN_PEXPANDB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv16qi_maskz, "__builtin_ia32_expandqi128_maskz",
> IX86_BUILTIN_PEXPANDB128Z, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv16hi_mask, "__builtin_ia32_expandhi256_mask",
> IX86_BUILTIN_PEXPANDW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv16hi_maskz, "__builtin_ia32_expandhi256_maskz",
> IX86_BUILTIN_PEXPANDW256Z, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv8hi_mask, "__builtin_ia32_expandhi128_mask",
> IX86_BUILTIN_PEXPANDW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv8hi_maskz, "__builtin_ia32_expandhi128_maskz",
> IX86_BUILTIN_PEXPANDW128Z, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v32hi,
> "__builtin_ia32_vpshrd_v32hi", IX86_BUILTIN_VPSHRDV32HI, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v32hi_mask,
> "__builtin_ia32_vpshrd_v32hi_mask", IX86_BUILTIN_VPSHRDV32HI_MASK, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v16hi,
> "__builtin_ia32_vpshrd_v16hi", IX86_BUILTIN_VPSHRDV16HI, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V16HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v16hi_mask,
> "__builtin_ia32_vpshrd_v16hi_mask", IX86_BUILTIN_VPSHRDV16HI_MASK, UNKNOWN,
> (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8hi,
> "__builtin_ia32_vpshrd_v8hi", IX86_BUILTIN_VPSHRDV8HI, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8hi_mask,
> "__builtin_ia32_vpshrd_v8hi_mask", IX86_BUILTIN_VPSHRDV8HI_MASK, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_INT_V8HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v16si,
> "__builtin_ia32_vpshrd_v16si", IX86_BUILTIN_VPSHRDV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v16si_mask,
> "__builtin_ia32_vpshrd_v16si_mask", IX86_BUILTIN_VPSHRDV16SI_MASK, UNKNOWN,
> (int) V16SI_FTYPE_V16SI_V16SI_INT_V16SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8si,
> "__builtin_ia32_vpshrd_v8si", IX86_BUILTIN_VPSHRDV8SI, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8si_mask,
> "__builtin_ia32_vpshrd_v8si_mask", IX86_BUILTIN_VPSHRDV8SI_MASK, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_INT_V8SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v4si,
> "__builtin_ia32_vpshrd_v4si", IX86_BUILTIN_VPSHRDV4SI, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v4si_mask,
> "__builtin_ia32_vpshrd_v4si_mask", IX86_BUILTIN_VPSHRDV4SI_MASK, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_INT_V4SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8di,
> "__builtin_ia32_vpshrd_v8di", IX86_BUILTIN_VPSHRDV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8di_mask,
> "__builtin_ia32_vpshrd_v8di_mask", IX86_BUILTIN_VPSHRDV8DI_MASK, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_INT_V8DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v4di,
> "__builtin_ia32_vpshrd_v4di", IX86_BUILTIN_VPSHRDV4DI, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V4DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v4di_mask,
> "__builtin_ia32_vpshrd_v4di_mask", IX86_BUILTIN_VPSHRDV4DI_MASK, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_INT_V4DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v2di,
> "__builtin_ia32_vpshrd_v2di", IX86_BUILTIN_VPSHRDV2DI, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v2di_mask,
> "__builtin_ia32_vpshrd_v2di_mask", IX86_BUILTIN_VPSHRDV2DI_MASK, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v32hi,
> "__builtin_ia32_vpshld_v32hi", IX86_BUILTIN_VPSHLDV32HI, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v32hi_mask,
> "__builtin_ia32_vpshld_v32hi_mask", IX86_BUILTIN_VPSHLDV32HI_MASK, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v16hi,
> "__builtin_ia32_vpshld_v16hi", IX86_BUILTIN_VPSHLDV16HI, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V16HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v16hi_mask,
> "__builtin_ia32_vpshld_v16hi_mask", IX86_BUILTIN_VPSHLDV16HI_MASK, UNKNOWN,
> (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8hi,
> "__builtin_ia32_vpshld_v8hi", IX86_BUILTIN_VPSHLDV8HI, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8hi_mask,
> "__builtin_ia32_vpshld_v8hi_mask", IX86_BUILTIN_VPSHLDV8HI_MASK, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_INT_V8HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v16si,
> "__builtin_ia32_vpshld_v16si", IX86_BUILTIN_VPSHLDV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v16si_mask,
> "__builtin_ia32_vpshld_v16si_mask", IX86_BUILTIN_VPSHLDV16SI_MASK, UNKNOWN,
> (int) V16SI_FTYPE_V16SI_V16SI_INT_V16SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8si,
> "__builtin_ia32_vpshld_v8si", IX86_BUILTIN_VPSHLDV8SI, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8si_mask,
> "__builtin_ia32_vpshld_v8si_mask", IX86_BUILTIN_VPSHLDV8SI_MASK, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_INT_V8SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v4si,
> "__builtin_ia32_vpshld_v4si", IX86_BUILTIN_VPSHLDV4SI, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v4si_mask,
> "__builtin_ia32_vpshld_v4si_mask", IX86_BUILTIN_VPSHLDV4SI_MASK, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_INT_V4SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8di,
> "__builtin_ia32_vpshld_v8di", IX86_BUILTIN_VPSHLDV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8di_mask,
> "__builtin_ia32_vpshld_v8di_mask", IX86_BUILTIN_VPSHLDV8DI_MASK, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_INT_V8DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v4di,
> "__builtin_ia32_vpshld_v4di", IX86_BUILTIN_VPSHLDV4DI, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V4DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v4di_mask,
> "__builtin_ia32_vpshld_v4di_mask", IX86_BUILTIN_VPSHLDV4DI_MASK, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_INT_V4DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v2di,
> "__builtin_ia32_vpshld_v2di", IX86_BUILTIN_VPSHLDV2DI, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v2di_mask,
> "__builtin_ia32_vpshld_v2di_mask", IX86_BUILTIN_VPSHLDV2DI_MASK, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
> +
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v32hi,
> "__builtin_ia32_vpshrdv_v32hi", IX86_BUILTIN_VPSHRDVV32HI, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_V32HI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v32hi_mask,
> "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v32hi_maskz,
> "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ,
> UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16hi,
> "__builtin_ia32_vpshrdv_v16hi", IX86_BUILTIN_VPSHRDVV16HI, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V16HI_V16HI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16hi_mask,
> "__builtin_ia32_vpshrdv_v16hi_mask", IX86_BUILTIN_VPSHRDVV16HI_MASK, UNKNOWN,
> (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16hi_maskz,
> "__builtin_ia32_vpshrdv_v16hi_maskz", IX86_BUILTIN_VPSHRDVV16HI_MASKZ,
> UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8hi,
> "__builtin_ia32_vpshrdv_v8hi", IX86_BUILTIN_VPSHRDVV8HI, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_V8HI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8hi_mask,
> "__builtin_ia32_vpshrdv_v8hi_mask", IX86_BUILTIN_VPSHRDVV8HI_MASK, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8hi_maskz,
> "__builtin_ia32_vpshrdv_v8hi_maskz", IX86_BUILTIN_VPSHRDVV8HI_MASKZ, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16si,
> "__builtin_ia32_vpshrdv_v16si", IX86_BUILTIN_VPSHRDVV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_V16SI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16si_mask,
> "__builtin_ia32_vpshrdv_v16si_mask", IX86_BUILTIN_VPSHRDVV16SI_MASK, UNKNOWN,
> (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16si_maskz,
> "__builtin_ia32_vpshrdv_v16si_maskz", IX86_BUILTIN_VPSHRDVV16SI_MASKZ,
> UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8si,
> "__builtin_ia32_vpshrdv_v8si", IX86_BUILTIN_VPSHRDVV8SI, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_V8SI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8si_mask,
> "__builtin_ia32_vpshrdv_v8si_mask", IX86_BUILTIN_VPSHRDVV8SI_MASK, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8si_maskz,
> "__builtin_ia32_vpshrdv_v8si_maskz", IX86_BUILTIN_VPSHRDVV8SI_MASKZ, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4si,
> "__builtin_ia32_vpshrdv_v4si", IX86_BUILTIN_VPSHRDVV4SI, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4si_mask,
> "__builtin_ia32_vpshrdv_v4si_mask", IX86_BUILTIN_VPSHRDVV4SI_MASK, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4si_maskz,
> "__builtin_ia32_vpshrdv_v4si_maskz", IX86_BUILTIN_VPSHRDVV4SI_MASKZ, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8di,
> "__builtin_ia32_vpshrdv_v8di", IX86_BUILTIN_VPSHRDVV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_V8DI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8di_mask,
> "__builtin_ia32_vpshrdv_v8di_mask", IX86_BUILTIN_VPSHRDVV8DI_MASK, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8di_maskz,
> "__builtin_ia32_vpshrdv_v8di_maskz", IX86_BUILTIN_VPSHRDVV8DI_MASKZ, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4di,
> "__builtin_ia32_vpshrdv_v4di", IX86_BUILTIN_VPSHRDVV4DI, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V4DI_V4DI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4di_mask,
> "__builtin_ia32_vpshrdv_v4di_mask", IX86_BUILTIN_VPSHRDVV4DI_MASK, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4di_maskz,
> "__builtin_ia32_vpshrdv_v4di_maskz", IX86_BUILTIN_VPSHRDVV4DI_MASKZ, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v2di,
> "__builtin_ia32_vpshrdv_v2di", IX86_BUILTIN_VPSHRDVV2DI, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v2di_mask,
> "__builtin_ia32_vpshrdv_v2di_mask", IX86_BUILTIN_VPSHRDVV2DI_MASK, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v2di_maskz,
> "__builtin_ia32_vpshrdv_v2di_maskz", IX86_BUILTIN_VPSHRDVV2DI_MASKZ, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
> +
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v32hi,
> "__builtin_ia32_vpshldv_v32hi", IX86_BUILTIN_VPSHLDVV32HI, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_V32HI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v32hi_mask,
> "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v32hi_maskz,
> "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ,
> UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16hi,
> "__builtin_ia32_vpshldv_v16hi", IX86_BUILTIN_VPSHLDVV16HI, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V16HI_V16HI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16hi_mask,
> "__builtin_ia32_vpshldv_v16hi_mask", IX86_BUILTIN_VPSHLDVV16HI_MASK, UNKNOWN,
> (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16hi_maskz,
> "__builtin_ia32_vpshldv_v16hi_maskz", IX86_BUILTIN_VPSHLDVV16HI_MASKZ,
> UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8hi,
> "__builtin_ia32_vpshldv_v8hi", IX86_BUILTIN_VPSHLDVV8HI, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_V8HI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8hi_mask,
> "__builtin_ia32_vpshldv_v8hi_mask", IX86_BUILTIN_VPSHLDVV8HI_MASK, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8hi_maskz,
> "__builtin_ia32_vpshldv_v8hi_maskz", IX86_BUILTIN_VPSHLDVV8HI_MASKZ, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16si,
> "__builtin_ia32_vpshldv_v16si", IX86_BUILTIN_VPSHLDVV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_V16SI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16si_mask,
> "__builtin_ia32_vpshldv_v16si_mask", IX86_BUILTIN_VPSHLDVV16SI_MASK, UNKNOWN,
> (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16si_maskz,
> "__builtin_ia32_vpshldv_v16si_maskz", IX86_BUILTIN_VPSHLDVV16SI_MASKZ,
> UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8si,
> "__builtin_ia32_vpshldv_v8si", IX86_BUILTIN_VPSHLDVV8SI, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_V8SI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8si_mask,
> "__builtin_ia32_vpshldv_v8si_mask", IX86_BUILTIN_VPSHLDVV8SI_MASK, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8si_maskz,
> "__builtin_ia32_vpshldv_v8si_maskz", IX86_BUILTIN_VPSHLDVV8SI_MASKZ, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4si,
> "__builtin_ia32_vpshldv_v4si", IX86_BUILTIN_VPSHLDVV4SI, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4si_mask,
> "__builtin_ia32_vpshldv_v4si_mask", IX86_BUILTIN_VPSHLDVV4SI_MASK, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4si_maskz,
> "__builtin_ia32_vpshldv_v4si_maskz", IX86_BUILTIN_VPSHLDVV4SI_MASKZ, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8di,
> "__builtin_ia32_vpshldv_v8di", IX86_BUILTIN_VPSHLDVV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_V8DI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8di_mask,
> "__builtin_ia32_vpshldv_v8di_mask", IX86_BUILTIN_VPSHLDVV8DI_MASK, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8di_maskz,
> "__builtin_ia32_vpshldv_v8di_maskz", IX86_BUILTIN_VPSHLDVV8DI_MASKZ, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4di,
> "__builtin_ia32_vpshldv_v4di", IX86_BUILTIN_VPSHLDVV4DI, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V4DI_V4DI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4di_mask,
> "__builtin_ia32_vpshldv_v4di_mask", IX86_BUILTIN_VPSHLDVV4DI_MASK, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4di_maskz,
> "__builtin_ia32_vpshldv_v4di_maskz", IX86_BUILTIN_VPSHLDVV4DI_MASKZ, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v2di,
> "__builtin_ia32_vpshldv_v2di", IX86_BUILTIN_VPSHLDVV2DI, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v2di_mask,
> "__builtin_ia32_vpshldv_v2di_mask", IX86_BUILTIN_VPSHLDVV2DI_MASK, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v2di_maskz,
> "__builtin_ia32_vpshldv_v2di_maskz", IX86_BUILTIN_VPSHLDVV2DI_MASKZ, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
> +
> /* GFNI */
> BDESC (OPTION_MASK_ISA_GFNI, CODE_FOR_vgf2p8affineinvqb_v64qi,
> "__builtin_ia32_vgf2p8affineinvqb_v64qi", IX86_BUILTIN_VGF2P8AFFINEINVQB512,
> UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_INT)
> BDESC (OPTION_MASK_ISA_GFNI | OPTION_MASK_ISA_AVX512BW,
> CODE_FOR_vgf2p8affineinvqb_v64qi_mask,
> "__builtin_ia32_vgf2p8affineinvqb_v64qi_mask",
> IX86_BUILTIN_VGF2P8AFFINEINVQB512MASK, UNKNOWN, (int)
> V64QI_FTYPE_V64QI_V64QI_INT_V64QI_UDI)
> @@ -2614,118 +2749,6 @@ BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ,
> /* RDPID */
> BDESC (OPTION_MASK_ISA_RDPID, CODE_FOR_rdpid, "__builtin_ia32_rdpid",
> IX86_BUILTIN_RDPID, UNKNOWN, (int) UNSIGNED_FTYPE_VOID)
>
> -/* VBMI2 */
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_compressv64qi_mask,
> "__builtin_ia32_compressqi512_mask", IX86_BUILTIN_PCOMPRESSB512, UNKNOWN,
> (int) V64QI_FTYPE_V64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_compressv32hi_mask,
> "__builtin_ia32_compresshi512_mask", IX86_BUILTIN_PCOMPRESSW512, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressv32qi_mask, "__builtin_ia32_compressqi256_mask",
> IX86_BUILTIN_PCOMPRESSB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressv16qi_mask, "__builtin_ia32_compressqi128_mask",
> IX86_BUILTIN_PCOMPRESSB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressv16hi_mask, "__builtin_ia32_compresshi256_mask",
> IX86_BUILTIN_PCOMPRESSW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressv8hi_mask, "__builtin_ia32_compresshi128_mask",
> IX86_BUILTIN_PCOMPRESSW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv64qi_mask,
> "__builtin_ia32_expandqi512_mask", IX86_BUILTIN_PEXPANDB512, UNKNOWN, (int)
> V64QI_FTYPE_V64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv64qi_maskz,
> "__builtin_ia32_expandqi512_maskz", IX86_BUILTIN_PEXPANDB512Z, UNKNOWN, (int)
> V64QI_FTYPE_V64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32hi_mask,
> "__builtin_ia32_expandhi512_mask", IX86_BUILTIN_PEXPANDW512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32hi_maskz,
> "__builtin_ia32_expandhi512_maskz", IX86_BUILTIN_PEXPANDW512Z, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandqi256_mask",
> IX86_BUILTIN_PEXPANDB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandqi256_maskz",
> IX86_BUILTIN_PEXPANDB256Z, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv16qi_mask, "__builtin_ia32_expandqi128_mask",
> IX86_BUILTIN_PEXPANDB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv16qi_maskz, "__builtin_ia32_expandqi128_maskz",
> IX86_BUILTIN_PEXPANDB128Z, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv16hi_mask, "__builtin_ia32_expandhi256_mask",
> IX86_BUILTIN_PEXPANDW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv16hi_maskz, "__builtin_ia32_expandhi256_maskz",
> IX86_BUILTIN_PEXPANDW256Z, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv8hi_mask, "__builtin_ia32_expandhi128_mask",
> IX86_BUILTIN_PEXPANDW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_expandv8hi_maskz, "__builtin_ia32_expandhi128_maskz",
> IX86_BUILTIN_PEXPANDW128Z, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v32hi,
> "__builtin_ia32_vpshrd_v32hi", IX86_BUILTIN_VPSHRDV32HI, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v32hi_mask,
> "__builtin_ia32_vpshrd_v32hi_mask", IX86_BUILTIN_VPSHRDV32HI_MASK, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v16hi,
> "__builtin_ia32_vpshrd_v16hi", IX86_BUILTIN_VPSHRDV16HI, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V16HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v16hi_mask,
> "__builtin_ia32_vpshrd_v16hi_mask", IX86_BUILTIN_VPSHRDV16HI_MASK, UNKNOWN,
> (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8hi,
> "__builtin_ia32_vpshrd_v8hi", IX86_BUILTIN_VPSHRDV8HI, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8hi_mask,
> "__builtin_ia32_vpshrd_v8hi_mask", IX86_BUILTIN_VPSHRDV8HI_MASK, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_INT_V8HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v16si,
> "__builtin_ia32_vpshrd_v16si", IX86_BUILTIN_VPSHRDV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v16si_mask,
> "__builtin_ia32_vpshrd_v16si_mask", IX86_BUILTIN_VPSHRDV16SI_MASK, UNKNOWN,
> (int) V16SI_FTYPE_V16SI_V16SI_INT_V16SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8si,
> "__builtin_ia32_vpshrd_v8si", IX86_BUILTIN_VPSHRDV8SI, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8si_mask,
> "__builtin_ia32_vpshrd_v8si_mask", IX86_BUILTIN_VPSHRDV8SI_MASK, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_INT_V8SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v4si,
> "__builtin_ia32_vpshrd_v4si", IX86_BUILTIN_VPSHRDV4SI, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v4si_mask,
> "__builtin_ia32_vpshrd_v4si_mask", IX86_BUILTIN_VPSHRDV4SI_MASK, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_INT_V4SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8di,
> "__builtin_ia32_vpshrd_v8di", IX86_BUILTIN_VPSHRDV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v8di_mask,
> "__builtin_ia32_vpshrd_v8di_mask", IX86_BUILTIN_VPSHRDV8DI_MASK, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_INT_V8DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v4di,
> "__builtin_ia32_vpshrd_v4di", IX86_BUILTIN_VPSHRDV4DI, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V4DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v4di_mask,
> "__builtin_ia32_vpshrd_v4di_mask", IX86_BUILTIN_VPSHRDV4DI_MASK, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_INT_V4DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v2di,
> "__builtin_ia32_vpshrd_v2di", IX86_BUILTIN_VPSHRDV2DI, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrd_v2di_mask,
> "__builtin_ia32_vpshrd_v2di_mask", IX86_BUILTIN_VPSHRDV2DI_MASK, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v32hi,
> "__builtin_ia32_vpshld_v32hi", IX86_BUILTIN_VPSHLDV32HI, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v32hi_mask,
> "__builtin_ia32_vpshld_v32hi_mask", IX86_BUILTIN_VPSHLDV32HI_MASK, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v16hi,
> "__builtin_ia32_vpshld_v16hi", IX86_BUILTIN_VPSHLDV16HI, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V16HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v16hi_mask,
> "__builtin_ia32_vpshld_v16hi_mask", IX86_BUILTIN_VPSHLDV16HI_MASK, UNKNOWN,
> (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8hi,
> "__builtin_ia32_vpshld_v8hi", IX86_BUILTIN_VPSHLDV8HI, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8hi_mask,
> "__builtin_ia32_vpshld_v8hi_mask", IX86_BUILTIN_VPSHLDV8HI_MASK, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_INT_V8HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v16si,
> "__builtin_ia32_vpshld_v16si", IX86_BUILTIN_VPSHLDV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v16si_mask,
> "__builtin_ia32_vpshld_v16si_mask", IX86_BUILTIN_VPSHLDV16SI_MASK, UNKNOWN,
> (int) V16SI_FTYPE_V16SI_V16SI_INT_V16SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8si,
> "__builtin_ia32_vpshld_v8si", IX86_BUILTIN_VPSHLDV8SI, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8si_mask,
> "__builtin_ia32_vpshld_v8si_mask", IX86_BUILTIN_VPSHLDV8SI_MASK, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_INT_V8SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v4si,
> "__builtin_ia32_vpshld_v4si", IX86_BUILTIN_VPSHLDV4SI, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v4si_mask,
> "__builtin_ia32_vpshld_v4si_mask", IX86_BUILTIN_VPSHLDV4SI_MASK, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_INT_V4SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8di,
> "__builtin_ia32_vpshld_v8di", IX86_BUILTIN_VPSHLDV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v8di_mask,
> "__builtin_ia32_vpshld_v8di_mask", IX86_BUILTIN_VPSHLDV8DI_MASK, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_INT_V8DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v4di,
> "__builtin_ia32_vpshld_v4di", IX86_BUILTIN_VPSHLDV4DI, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V4DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v4di_mask,
> "__builtin_ia32_vpshld_v4di_mask", IX86_BUILTIN_VPSHLDV4DI_MASK, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_INT_V4DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v2di,
> "__builtin_ia32_vpshld_v2di", IX86_BUILTIN_VPSHLDV2DI, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshld_v2di_mask,
> "__builtin_ia32_vpshld_v2di_mask", IX86_BUILTIN_VPSHLDV2DI_MASK, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
> -
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v32hi,
> "__builtin_ia32_vpshrdv_v32hi", IX86_BUILTIN_VPSHRDVV32HI, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_V32HI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v32hi_mask,
> "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v32hi_maskz,
> "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ,
> UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16hi,
> "__builtin_ia32_vpshrdv_v16hi", IX86_BUILTIN_VPSHRDVV16HI, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V16HI_V16HI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16hi_mask,
> "__builtin_ia32_vpshrdv_v16hi_mask", IX86_BUILTIN_VPSHRDVV16HI_MASK, UNKNOWN,
> (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16hi_maskz,
> "__builtin_ia32_vpshrdv_v16hi_maskz", IX86_BUILTIN_VPSHRDVV16HI_MASKZ,
> UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8hi,
> "__builtin_ia32_vpshrdv_v8hi", IX86_BUILTIN_VPSHRDVV8HI, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_V8HI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8hi_mask,
> "__builtin_ia32_vpshrdv_v8hi_mask", IX86_BUILTIN_VPSHRDVV8HI_MASK, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8hi_maskz,
> "__builtin_ia32_vpshrdv_v8hi_maskz", IX86_BUILTIN_VPSHRDVV8HI_MASKZ, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16si,
> "__builtin_ia32_vpshrdv_v16si", IX86_BUILTIN_VPSHRDVV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_V16SI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16si_mask,
> "__builtin_ia32_vpshrdv_v16si_mask", IX86_BUILTIN_VPSHRDVV16SI_MASK, UNKNOWN,
> (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v16si_maskz,
> "__builtin_ia32_vpshrdv_v16si_maskz", IX86_BUILTIN_VPSHRDVV16SI_MASKZ,
> UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8si,
> "__builtin_ia32_vpshrdv_v8si", IX86_BUILTIN_VPSHRDVV8SI, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_V8SI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8si_mask,
> "__builtin_ia32_vpshrdv_v8si_mask", IX86_BUILTIN_VPSHRDVV8SI_MASK, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8si_maskz,
> "__builtin_ia32_vpshrdv_v8si_maskz", IX86_BUILTIN_VPSHRDVV8SI_MASKZ, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4si,
> "__builtin_ia32_vpshrdv_v4si", IX86_BUILTIN_VPSHRDVV4SI, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4si_mask,
> "__builtin_ia32_vpshrdv_v4si_mask", IX86_BUILTIN_VPSHRDVV4SI_MASK, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4si_maskz,
> "__builtin_ia32_vpshrdv_v4si_maskz", IX86_BUILTIN_VPSHRDVV4SI_MASKZ, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8di,
> "__builtin_ia32_vpshrdv_v8di", IX86_BUILTIN_VPSHRDVV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_V8DI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8di_mask,
> "__builtin_ia32_vpshrdv_v8di_mask", IX86_BUILTIN_VPSHRDVV8DI_MASK, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v8di_maskz,
> "__builtin_ia32_vpshrdv_v8di_maskz", IX86_BUILTIN_VPSHRDVV8DI_MASKZ, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4di,
> "__builtin_ia32_vpshrdv_v4di", IX86_BUILTIN_VPSHRDVV4DI, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V4DI_V4DI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4di_mask,
> "__builtin_ia32_vpshrdv_v4di_mask", IX86_BUILTIN_VPSHRDVV4DI_MASK, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v4di_maskz,
> "__builtin_ia32_vpshrdv_v4di_maskz", IX86_BUILTIN_VPSHRDVV4DI_MASKZ, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v2di,
> "__builtin_ia32_vpshrdv_v2di", IX86_BUILTIN_VPSHRDVV2DI, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v2di_mask,
> "__builtin_ia32_vpshrdv_v2di_mask", IX86_BUILTIN_VPSHRDVV2DI_MASK, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshrdv_v2di_maskz,
> "__builtin_ia32_vpshrdv_v2di_maskz", IX86_BUILTIN_VPSHRDVV2DI_MASKZ, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
> -
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v32hi,
> "__builtin_ia32_vpshldv_v32hi", IX86_BUILTIN_VPSHLDVV32HI, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_V32HI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v32hi_mask,
> "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v32hi_maskz,
> "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ,
> UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16hi,
> "__builtin_ia32_vpshldv_v16hi", IX86_BUILTIN_VPSHLDVV16HI, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V16HI_V16HI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16hi_mask,
> "__builtin_ia32_vpshldv_v16hi_mask", IX86_BUILTIN_VPSHLDVV16HI_MASK, UNKNOWN,
> (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16hi_maskz,
> "__builtin_ia32_vpshldv_v16hi_maskz", IX86_BUILTIN_VPSHLDVV16HI_MASKZ,
> UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8hi,
> "__builtin_ia32_vpshldv_v8hi", IX86_BUILTIN_VPSHLDVV8HI, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_V8HI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8hi_mask,
> "__builtin_ia32_vpshldv_v8hi_mask", IX86_BUILTIN_VPSHLDVV8HI_MASK, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8hi_maskz,
> "__builtin_ia32_vpshldv_v8hi_maskz", IX86_BUILTIN_VPSHLDVV8HI_MASKZ, UNKNOWN,
> (int) V8HI_FTYPE_V8HI_V8HI_V8HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16si,
> "__builtin_ia32_vpshldv_v16si", IX86_BUILTIN_VPSHLDVV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_V16SI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16si_mask,
> "__builtin_ia32_vpshldv_v16si_mask", IX86_BUILTIN_VPSHLDVV16SI_MASK, UNKNOWN,
> (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v16si_maskz,
> "__builtin_ia32_vpshldv_v16si_maskz", IX86_BUILTIN_VPSHLDVV16SI_MASKZ,
> UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8si,
> "__builtin_ia32_vpshldv_v8si", IX86_BUILTIN_VPSHLDVV8SI, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_V8SI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8si_mask,
> "__builtin_ia32_vpshldv_v8si_mask", IX86_BUILTIN_VPSHLDVV8SI_MASK, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8si_maskz,
> "__builtin_ia32_vpshldv_v8si_maskz", IX86_BUILTIN_VPSHLDVV8SI_MASKZ, UNKNOWN,
> (int) V8SI_FTYPE_V8SI_V8SI_V8SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4si,
> "__builtin_ia32_vpshldv_v4si", IX86_BUILTIN_VPSHLDVV4SI, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4si_mask,
> "__builtin_ia32_vpshldv_v4si_mask", IX86_BUILTIN_VPSHLDVV4SI_MASK, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4si_maskz,
> "__builtin_ia32_vpshldv_v4si_maskz", IX86_BUILTIN_VPSHLDVV4SI_MASKZ, UNKNOWN,
> (int) V4SI_FTYPE_V4SI_V4SI_V4SI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8di,
> "__builtin_ia32_vpshldv_v8di", IX86_BUILTIN_VPSHLDVV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_V8DI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8di_mask,
> "__builtin_ia32_vpshldv_v8di_mask", IX86_BUILTIN_VPSHLDVV8DI_MASK, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v8di_maskz,
> "__builtin_ia32_vpshldv_v8di_maskz", IX86_BUILTIN_VPSHLDVV8DI_MASKZ, UNKNOWN,
> (int) V8DI_FTYPE_V8DI_V8DI_V8DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4di,
> "__builtin_ia32_vpshldv_v4di", IX86_BUILTIN_VPSHLDVV4DI, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V4DI_V4DI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4di_mask,
> "__builtin_ia32_vpshldv_v4di_mask", IX86_BUILTIN_VPSHLDVV4DI_MASK, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v4di_maskz,
> "__builtin_ia32_vpshldv_v4di_maskz", IX86_BUILTIN_VPSHLDVV4DI_MASKZ, UNKNOWN,
> (int) V4DI_FTYPE_V4DI_V4DI_V4DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v2di,
> "__builtin_ia32_vpshldv_v2di", IX86_BUILTIN_VPSHLDVV2DI, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v2di_mask,
> "__builtin_ia32_vpshldv_v2di_mask", IX86_BUILTIN_VPSHLDVV2DI_MASK, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_vpshldv_v2di_maskz,
> "__builtin_ia32_vpshldv_v2di_maskz", IX86_BUILTIN_VPSHLDVV2DI_MASKZ, UNKNOWN,
> (int) V2DI_FTYPE_V2DI_V2DI_V2DI_INT)
> -
> /* VNNI */
>
> BDESC (OPTION_MASK_ISA_AVX512VNNI, CODE_FOR_vpdpbusd_v16si,
> "__builtin_ia32_vpdpbusd_v16si", IX86_BUILTIN_VPDPBUSDV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_V16SI)
> @@ -2782,30 +2805,7 @@ BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_va
> BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesenclast_v32qi,
> "__builtin_ia32_vaesenclast_v32qi", IX86_BUILTIN_VAESENCLAST32, UNKNOWN,
> (int) V32QI_FTYPE_V32QI_V32QI)
> BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesenclast_v64qi,
> "__builtin_ia32_vaesenclast_v64qi", IX86_BUILTIN_VAESENCLAST64, UNKNOWN,
> (int) V64QI_FTYPE_V64QI_V64QI)
>
> -BDESC_END (ARGS2, SPECIAL_ARGS2)
> -
> -BDESC_FIRST (special_args2, SPECIAL_ARGS2, OPTION_MASK_ISA_AVX512VBMI2,
> CODE_FOR_compressstorev64qi_mask, "__builtin_ia32_compressstoreuqi512_mask",
> IX86_BUILTIN_PCOMPRESSBSTORE512, UNKNOWN, (int) VOID_FTYPE_PV64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_compressstorev32hi_mask,
> "__builtin_ia32_compressstoreuhi512_mask", IX86_BUILTIN_PCOMPRESSWSTORE512,
> UNKNOWN, (int) VOID_FTYPE_PV32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressstorev32qi_mask, "__builtin_ia32_compressstoreuqi256_mask",
> IX86_BUILTIN_PCOMPRESSBSTORE256, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressstorev16qi_mask, "__builtin_ia32_compressstoreuqi128_mask",
> IX86_BUILTIN_PCOMPRESSBSTORE128, UNKNOWN, (int) VOID_FTYPE_PV16QI_V16QI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressstorev16hi_mask, "__builtin_ia32_compressstoreuhi256_mask",
> IX86_BUILTIN_PCOMPRESSWSTORE256, UNKNOWN, (int) VOID_FTYPE_PV16HI_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_compressstorev8hi_mask, "__builtin_ia32_compressstoreuhi128_mask",
> IX86_BUILTIN_PCOMPRESSWSTORE128, UNKNOWN, (int) VOID_FTYPE_PV8HI_V8HI_UQI)
> -
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv64qi_mask,
> "__builtin_ia32_expandloadqi512_mask", IX86_BUILTIN_PEXPANDBLOAD512, UNKNOWN,
> (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv64qi_maskz,
> "__builtin_ia32_expandloadqi512_maskz", IX86_BUILTIN_PEXPANDBLOAD512Z,
> UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32hi_mask,
> "__builtin_ia32_expandloadhi512_mask", IX86_BUILTIN_PEXPANDWLOAD512, UNKNOWN,
> (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32hi_maskz,
> "__builtin_ia32_expandloadhi512_maskz", IX86_BUILTIN_PEXPANDWLOAD512Z,
> UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
> -
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32qi_mask,
> "__builtin_ia32_expandloadqi256_mask", IX86_BUILTIN_PEXPANDBLOAD256, UNKNOWN,
> (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv32qi_maskz,
> "__builtin_ia32_expandloadqi256_maskz", IX86_BUILTIN_PEXPANDBLOAD256Z,
> UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv16hi_mask,
> "__builtin_ia32_expandloadhi256_mask", IX86_BUILTIN_PEXPANDWLOAD256, UNKNOWN,
> (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv16hi_maskz,
> "__builtin_ia32_expandloadhi256_maskz", IX86_BUILTIN_PEXPANDWLOAD256Z,
> UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
> -
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv16qi_mask,
> "__builtin_ia32_expandloadqi128_mask", IX86_BUILTIN_PEXPANDBLOAD128, UNKNOWN,
> (int) V16QI_FTYPE_PCV16QI_V16QI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv16qi_maskz,
> "__builtin_ia32_expandloadqi128_maskz", IX86_BUILTIN_PEXPANDBLOAD128Z,
> UNKNOWN, (int) V16QI_FTYPE_PCV16QI_V16QI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv8hi_mask,
> "__builtin_ia32_expandloadhi128_mask", IX86_BUILTIN_PEXPANDWLOAD128, UNKNOWN,
> (int) V8HI_FTYPE_PCV8HI_V8HI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2, CODE_FOR_expandv8hi_maskz,
> "__builtin_ia32_expandloadhi128_maskz", IX86_BUILTIN_PEXPANDWLOAD128Z,
> UNKNOWN, (int) V8HI_FTYPE_PCV8HI_V8HI_UQI)
> -BDESC_END (SPECIAL_ARGS2, MPX)
> +BDESC_END (ARGS2, MPX)
>
> /* Builtins for MPX. */
> BDESC_FIRST (mpx, MPX,
> --- gcc/config/i386/i386.opt.jj 2017-12-20 10:10:10.000000000 +0100
> +++ gcc/config/i386/i386.opt 2017-12-20 13:01:04.493207782 +0100
> @@ -738,7 +738,7 @@ Target Report Mask(ISA_AVX512VPOPCNTDQ)
> Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX512VPOPCNTDQ built-in functions and code generation.
>
> mavx512vbmi2
> -Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags2) Save
> +Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags) Save
> Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX512VBMI2 built-in functions and code generation.
>
> mavx512vnni
> @@ -806,7 +806,7 @@ Target Report Mask(ISA_LZCNT) Var(ix86_i
> Support LZCNT built-in function and code generation.
>
> mhle
> -Target Report Mask(ISA_HLE) Var(ix86_isa_flags) Save
> +Target Report Mask(ISA_HLE) Var(ix86_isa_flags2) Save
> Support Hardware Lock Elision prefixes.
>
> mrdseed
> @@ -866,7 +866,7 @@ Target Report Mask(ISA_SAHF) Var(ix86_is
> Support code generation of sahf instruction in 64bit x86-64 code.
>
> mmovbe
> -Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save
> +Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags2) Save
> Support code generation of movbe instruction.
>
> mcrc32
> @@ -943,11 +943,11 @@ Target Report Mask(ISA_MPX) Var(ix86_isa
> Support MPX code generation.
>
> mmwaitx
> -Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags) Save
> +Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags2) Save
> Support MWAITX and MONITORX built-in functions and code generation.
>
> mclzero
> -Target Report Mask(ISA_CLZERO) Var(ix86_isa_flags) Save
> +Target Report Mask(ISA_CLZERO) Var(ix86_isa_flags2) Save
> Support CLZERO built-in functions and code generation.
>
> mpku
> @@ -1005,7 +1005,7 @@ Specifically enables an indirect branch
> Enforcment Technology (CET).
>
> mshstk
> -Target Report Mask(ISA_SHSTK) Var(ix86_isa_flags2) Save
> +Target Report Mask(ISA_SHSTK) Var(ix86_isa_flags) Save
> Specifically enables an shadow stack support feature from Control-flow
> Enforcment Technology (CET).
>
> --- gcc/config/i386/i386-c.c.jj 2017-12-20 10:10:10.000000000 +0100
> +++ gcc/config/i386/i386-c.c 2017-12-20 13:03:47.680183573 +0100
> @@ -394,7 +394,7 @@ ix86_target_macros_internal (HOST_WIDE_I
> def_or_undef (parse_in, "__AVX512IFMA__");
> if (isa_flag2 & OPTION_MASK_ISA_AVX5124VNNIW)
> def_or_undef (parse_in, "__AVX5124VNNIW__");
> - if (isa_flag2 & OPTION_MASK_ISA_AVX512VBMI2)
> + if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2)
> def_or_undef (parse_in, "__AVX512VBMI2__");
> if (isa_flag2 & OPTION_MASK_ISA_AVX512VNNI)
> def_or_undef (parse_in, "__AVX512VNNI__");
> @@ -454,7 +454,7 @@ ix86_target_macros_internal (HOST_WIDE_I
> def_or_undef (parse_in, "__SSE2_MATH__");
> if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
> def_or_undef (parse_in, "__CLFLUSHOPT__");
> - if (isa_flag & OPTION_MASK_ISA_CLZERO)
> + if (isa_flag2 & OPTION_MASK_ISA_CLZERO)
> def_or_undef (parse_in, "__CLZERO__");
> if (isa_flag & OPTION_MASK_ISA_XSAVEC)
> def_or_undef (parse_in, "__XSAVEC__");
> @@ -464,7 +464,7 @@ ix86_target_macros_internal (HOST_WIDE_I
> def_or_undef (parse_in, "__MPX__");
> if (isa_flag & OPTION_MASK_ISA_CLWB)
> def_or_undef (parse_in, "__CLWB__");
> - if (isa_flag & OPTION_MASK_ISA_MWAITX)
> + if (isa_flag2 & OPTION_MASK_ISA_MWAITX)
> def_or_undef (parse_in, "__MWAITX__");
> if (isa_flag & OPTION_MASK_ISA_PKU)
> def_or_undef (parse_in, "__PKU__");
> @@ -478,7 +478,7 @@ ix86_target_macros_internal (HOST_WIDE_I
> if (flag_cf_protection != CF_NONE)
> def_or_undef (parse_in, "__CET__");
> }
> - if (isa_flag2 & OPTION_MASK_ISA_SHSTK)
> + if (isa_flag & OPTION_MASK_ISA_SHSTK)
> {
> def_or_undef (parse_in, "__SHSTK__");
> if (flag_cf_protection != CF_NONE)
> --- gcc/common/config/i386/i386-common.c.jj 2017-12-20 10:10:09.000000000
> +0100
> +++ gcc/common/config/i386/i386-common.c 2017-12-20 13:28:19.845886671
> +0100
> @@ -80,7 +80,8 @@ along with GCC; see the file COPYING3.
> (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512BW_SET)
> #define OPTION_MASK_ISA_AVX5124FMAPS_SET OPTION_MASK_ISA_AVX5124FMAPS
> #define OPTION_MASK_ISA_AVX5124VNNIW_SET OPTION_MASK_ISA_AVX5124VNNIW
> -#define OPTION_MASK_ISA_AVX512VBMI2_SET OPTION_MASK_ISA_AVX512VBMI2
> +#define OPTION_MASK_ISA_AVX512VBMI2_SET \
> + (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512F_SET)
> #define OPTION_MASK_ISA_AVX512VNNI_SET OPTION_MASK_ISA_AVX512VNNI
> #define OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET OPTION_MASK_ISA_AVX512VPOPCNTDQ
> #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
> @@ -183,7 +184,7 @@ along with GCC; see the file COPYING3.
> (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX512CD_UNSET \
> | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \
> | OPTION_MASK_ISA_AVX512DQ_UNSET | OPTION_MASK_ISA_AVX512BW_UNSET \
> - | OPTION_MASK_ISA_AVX512VL_UNSET)
> + | OPTION_MASK_ISA_AVX512VL_UNSET | OPTION_MASK_ISA_AVX512VBMI2_UNSET)
> #define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
> #define OPTION_MASK_ISA_AVX512PF_UNSET OPTION_MASK_ISA_AVX512PF
> #define OPTION_MASK_ISA_AVX512ER_UNSET OPTION_MASK_ISA_AVX512ER
> @@ -533,13 +534,13 @@ ix86_handle_option (struct gcc_options *
> case OPT_mshstk:
> if (value)
> {
> - opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_SHSTK_SET;
> - opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_SHSTK_SET;
> + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SHSTK_SET;
> + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SHSTK_SET;
> }
> else
> {
> - opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_SHSTK_UNSET;
> - opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_SHSTK_UNSET;
> + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SHSTK_UNSET;
> + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SHSTK_UNSET;
> }
> return true;
>
> @@ -602,15 +603,13 @@ ix86_handle_option (struct gcc_options *
> case OPT_mavx512vbmi2:
> if (value)
> {
> - opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512VBMI2_SET;
> - opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VBMI2_SET;
> - opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
> - opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
> + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI2_SET;
> + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI2_SET;
> }
> else
> {
> - opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX512VBMI2_UNSET;
> - opts->x_ix86_isa_flags2_explicit |=
> OPTION_MASK_ISA_AVX512VBMI2_UNSET;
> + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VBMI2_UNSET;
> + opts->x_ix86_isa_flags_explicit |=
> OPTION_MASK_ISA_AVX512VBMI2_UNSET;
> }
> return true;
>
> @@ -917,13 +916,13 @@ ix86_handle_option (struct gcc_options *
> case OPT_mmovbe:
> if (value)
> {
> - opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MOVBE_SET;
> - opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_SET;
> + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_MOVBE_SET;
> + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_MOVBE_SET;
> }
> else
> {
> - opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MOVBE_UNSET;
> - opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_UNSET;
> + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_MOVBE_UNSET;
> + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_MOVBE_UNSET;
> }
> return true;
>
> @@ -1164,26 +1163,26 @@ ix86_handle_option (struct gcc_options *
> case OPT_mmwaitx:
> if (value)
> {
> - opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MWAITX_SET;
> - opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MWAITX_SET;
> + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_MWAITX_SET;
> + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_MWAITX_SET;
> }
> else
> {
> - opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MWAITX_UNSET;
> - opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MWAITX_UNSET;
> + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_MWAITX_UNSET;
> + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_MWAITX_UNSET;
> }
> return true;
>
> case OPT_mclzero:
> if (value)
> {
> - opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLZERO_SET;
> - opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLZERO_SET;
> + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_CLZERO_SET;
> + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_CLZERO_SET;
> }
> else
> {
> - opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CLZERO_UNSET;
> - opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLZERO_UNSET;
> + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_CLZERO_UNSET;
> + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_CLZERO_UNSET;
> }
> return true;
>
> --- gcc/testsuite/gcc.target/i386/pr83488.c.jj 2017-12-20 15:13:52.584537344
> +0100
> +++ gcc/testsuite/gcc.target/i386/pr83488.c 2017-12-20 15:14:35.905003695
> +0100
> @@ -0,0 +1,9 @@
> +/* { dg-do compile } */
> +/* { dg-options "-mavx512vbmi2 -mno-avx512f" } */
> +
> +typedef long long __v8di __attribute__((vector_size (64)));
> +void
> +foo (__v8di *a, __v8di *b, __v8di *c, __v8di *d)
> +{
> + *d = __builtin_ia32_vpshldv_v8di (*a, *b, *c); /* { dg-warning "implicit"
> } */
> +} /* { dg-error "incompatible types when assigning to type" "" { target
> *-*-* } .-1 } */
>
> Jakub
