[PATCH][GCC][ARM] Fix fragile arm fpu attribute tests.

[Tamar Christina]

Hi All,

The previous test made use of arm_neon.h which made the whole test
rather fragile and only applicable to some of the arm targets.

So instead I make use of different fpus now to test the generation of
fmla instructions. The actual instruction itself is not tested as all
we care about if that the proper .fpu directives are generated.

Regtested on arm-none-eabi and arm-none-linux-gnueabihf
with no regressions.

Ok for trunk?


gcc/testsuite/
2017-12-12  Tamar Christina  <tamar.christ...@arm.com>

        PR target/82641
        * gcc.target/arm/pragma_fpu_attribute.c: New.
        * gcc.target/arm/pragma_fpu_attribute_2.c: New.

-- 

diff --git a/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute.c b/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute.c
index 5f039d9bfb2b14f9134f138527fc395b8e273bbb..8191deac25965564a3c78dc08959a5e5637a0066 100644
--- a/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute.c
+++ b/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute.c
@@ -1,21 +1,19 @@
 /* Test for target attribute assembly extension generations.  */
 /* { dg-do compile } */
-/* { dg-require-effective-target arm_arch_v8a_ok } */
-/* { dg-require-effective-target arm_neon_ok } */
 /* { dg-additional-options "-std=gnu99" } */
 
 #include <stdint.h>
-#include <arm_neon.h>
+
+extern uint32_t bar ();
 
 #pragma GCC target("fpu=vfpv3-d16")
 
-extern uint32_t bar();
+extern float fmaf (float, float, float);
 
-__attribute__((target("fpu=crypto-neon-fp-armv8"))) poly64x1_t vsricw(poly64x1_t crc, uint32_t val)
+float
+__attribute__((target("fpu=vfpv4"))) vfma32 (float x, float y, float z)
 {
-    poly64x1_t res;
-    asm("vsri %0, %1, %2" : "=r"(res) : "r"(crc), "r"(val));
-    return res;
+  return fmaf (x, y, z);
 }
 
 uint32_t restored ()
@@ -23,5 +21,5 @@ uint32_t restored ()
   return bar();
 }
 
-/* { dg-final { scan-assembler-times {\.fpu\s+crypto-neon-fp-armv8} 1 } } */
+/* { dg-final { scan-assembler-times {\.fpu\s+vfpv4} 1 } } */
 /* { dg-final { scan-assembler-times {\.fpu\s+vfpv3-d16} 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c b/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c
index b710de38612707b9109966f7bbc694a913121cb6..b50d4107b56ed7abd8b95fd2a3a08df8ab54410a 100644
--- a/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c
+++ b/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c
@@ -1,7 +1,5 @@
 /* Test for #pragma assembly extension generations.  */
 /* { dg-do compile } */
-/* { dg-require-effective-target arm_arch_v8a_ok } */
-/* { dg-require-effective-target arm_neon_ok } */
 /* { dg-additional-options "-std=gnu99" } */
 
 #include <stdint.h>
@@ -12,12 +10,13 @@
 extern uint32_t bar();
 
 #pragma GCC push_options
-#pragma GCC target("fpu=crypto-neon-fp-armv8")
-poly64x1_t vsricw(poly64x1_t crc, uint32_t val)
+#pragma GCC target("fpu=vfpv4")
+extern float fmaf (float, float, float);
+
+float
+vfma32 (float x, float y, float z)
 {
-    poly64x1_t res;
-    asm("vsri %0, %1, %2" : "=r"(res) : "r"(crc), "r"(val));
-    return res;
+  return fmaf (x, y, z);
 }
 #pragma GCC pop_options
 
@@ -26,5 +25,5 @@ uint32_t restored ()
   return bar();
 }
 
-/* { dg-final { scan-assembler-times {\.fpu\s+crypto-neon-fp-armv8} 1 } } */
+/* { dg-final { scan-assembler-times {\.fpu\s+vfpv4} 1 } } */
 /* { dg-final { scan-assembler-times {\.fpu\s+vfpv3-d16} 1 } } */