On Wed, Nov 29, 2017 at 9:24 AM, Jakub Jelinek <ja...@redhat.com> wrote: > Hi! > > Before r218303 we had just (=x,0,rm) alternative for SSE4 (no AVX), > that change turned it into (=Yr,0,*rm) and (=*x,0,rm) alternatives, > so that we avoid too many prefixes if possible. > The latter alternative is fine, we want the *, because that is the point, > Yr class is the subset of x registers that don't need the REX prefix. > The * in the first alternative makes no sense, with it IRA is effectively > forced to allocate the second vec_concat pseudo into NO_REGS - memory, > and while postreload can fix it up afterwards, we end up with dead stores > that nothing ever removes afterwards. > > Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for > trunk? > > 2017-11-29 Jakub Jelinek <ja...@redhat.com> > > PR target/80819 > * config/i386/sse.md (vec_concatv2di): Remove * from (=Yr,0,*rm) > alternative. > > * gcc.target/i386/pr80819-1.c: New test. > * gcc.target/i386/pr80819-2.c: New test.
OK. Thanks, Uros. > --- gcc/config/i386/sse.md.jj 2017-11-24 08:58:05.000000000 +0100 > +++ gcc/config/i386/sse.md 2017-11-28 18:04:20.739396199 +0100 > @@ -13915,7 +13915,7 @@ (define_insn "vec_concatv2di" > (match_operand:DI 1 "nonimmediate_operand" > " 0, 0,x ,Yv,r ,vm,?!*Yn,0,Yv,0,0,v") > (match_operand:DI 2 "vector_move_operand" > - "*rm,rm,rm,rm,C ,C ,C ,x,Yv,x,m,m")))] > + " rm,rm,rm,rm,C ,C ,C ,x,Yv,x,m,m")))] > "TARGET_SSE" > "@ > pinsrq\t{$1, %2, %0|%0, %2, 1} > --- gcc/testsuite/gcc.target/i386/pr80819-1.c.jj 2017-11-28 > 18:11:09.452482042 +0100 > +++ gcc/testsuite/gcc.target/i386/pr80819-1.c 2017-11-28 18:09:57.000000000 > +0100 > @@ -0,0 +1,13 @@ > +/* PR target/80819 */ > +/* { dg-do compile { target { ! ia32 } } } */ > +/* { dg-options "-O2 -msse4 -mno-avx -mtune=haswell -masm=att" } */ > + > +typedef unsigned long long V __attribute__((vector_size (16))); > + > +V > +foo (unsigned long long x, unsigned long long y) > +{ > + return (V) { x, y }; > +} > + > +/* { dg-final { scan-assembler-not "movq\[ \t]*%rsi, \[-0-9]*\\(" } } */ > --- gcc/testsuite/gcc.target/i386/pr80819-2.c.jj 2017-11-28 > 18:11:15.942404034 +0100 > +++ gcc/testsuite/gcc.target/i386/pr80819-2.c 2017-11-28 18:11:21.915332239 > +0100 > @@ -0,0 +1,13 @@ > +/* PR target/80819 */ > +/* { dg-do compile { target { ! ia32 } } } */ > +/* { dg-options "-O2 -msse4 -mno-avx -mtune=generic -masm=att" } */ > + > +typedef unsigned long long V __attribute__((vector_size (16))); > + > +V > +foo (unsigned long long x, unsigned long long y) > +{ > + return (V) { x, y }; > +} > + > +/* { dg-final { scan-assembler-not "movq\[ \t]*%rsi, \[-0-9]*\\(" } } */ > > Jakub