James Greenhalgh wrote:
>
> This caused:
>
> Failures:
> gcc.target/aarch64/test_frame_4.c
> gcc.target/aarch64/test_frame_2.c
> gcc.target/aarch64/test_frame_7.c
> gcc.target/aarch64/test_frame_10.c
Sorry, I missed that in testing. I've reverted part of the patch that caused
this.
The tests are definitely too picky but they also uncovered a real code
generation
inefficiency, so I need to look into that further.
I've committed this:
2017-11-03 Wilco Dijkstra <wdijk...@arm.com>
PR target/82786
* config/aarch64/aarch64.c (aarch64_layout_frame):
Undo forcing of LR at bottom of frame.
--
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2fc7db4..949f3cb 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-11-03 Wilco Dijkstra <wdijk...@arm.com>
+
+ PR target/82786
+ * config/aarch64/aarch64.c (aarch64_layout_frame):
+ Undo forcing of LR at bottom of frame.
+
2017-11-03 Jeff Law <l...@redhat.com>
* cfganal.c (single_pred_edge_ignoring_loop_edges): New function
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 1e12645..12f247d 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -2908,8 +2908,7 @@ aarch64_frame_pointer_required (void)
/* Mark the registers that need to be saved by the callee and calculate
the size of the callee-saved registers area and frame record (both FP
- and LR may be omitted). If the function is not a leaf, ensure LR is
- saved at the bottom of the callee-save area. */
+ and LR may be omitted). */
static void
aarch64_layout_frame (void)
{
@@ -2966,13 +2965,6 @@ aarch64_layout_frame (void)
cfun->machine->frame.wb_candidate2 = R30_REGNUM;
offset = 2 * UNITS_PER_WORD;
}
- else if (!crtl->is_leaf)
- {
- /* Ensure LR is saved at the bottom of the callee-saves. */
- cfun->machine->frame.reg_offset[R30_REGNUM] = 0;
- cfun->machine->frame.wb_candidate1 = R30_REGNUM;
- offset = UNITS_PER_WORD;
- }
/* Now assign stack slots for them. */
for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
