From 5799cd9915c07c498079fa463d813d0b4005fbc5 Mon Sep 17 00:00:00 2001
From: claziss <claziss@synopsys.com>
Date: Fri, 3 Nov 2017 12:16:02 +0100
Subject: [PATCH] [ARC][DOC] Add 'uncached' documentation

---
 gcc/doc/extend.texi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 1f6ef4e..b02777e 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -6728,6 +6728,7 @@ attributes.
 
 @menu
 * Common Type Attributes::
+* ARC Type Attributes::
 * ARM Type Attributes::
 * MeP Type Attributes::
 * PowerPC Type Attributes::
@@ -7161,6 +7162,16 @@ To specify multiple attributes, separate them by commas within the
 double parentheses: for example, @samp{__attribute__ ((aligned (16),
 packed))}.
 
+@node ARC Type Attributes
+@subsection ARC Type Attributes
+
+@cindex @code{uncached} type attribute, ARC
+Declaring variables @code{uncached} allows you to exclude data-cache
+participation in load and store operations on those variables without
+involving the additional semantic implications of volatile.  The
+@code{.di} instruction suffix is used for all loads and stores of data
+declared @code{uncached}.
+
 @node ARM Type Attributes
 @subsection ARM Type Attributes
 
-- 
1.9.1

