Vladimir Makarov wrote: > > As I correctly understand, you just want an intuitive allocation. The > current allocation performance has the same quality as the intuitive one.
Performance is affected as well but I didn't want to go into details as that distracts from the underlying issue. But if you're interested - on AArch64 there is an optimization phase dedicated to renaming registers to fix various issues with FMAC. It doesn't work as well as expected since it is hard to do a global rename after register allocation. Given the register allocator already supports move preferencing, using that is far simpler. A few experiments showed that move preferencing does much better. > In this case it would be hard for me to approve such change because it > gives no performance improvement but complicates machine description > definition which is already too complicated. I'm not suggesting to add extra complication, just to make existing syntax work as expected. My experiment required 2 lines of code. > I think if it is important for some cases may be it is possible to find > an alternative solution without introducing a new hint. Segher proposed > some solutions. They might work. If they don't work we could try to > change heuristics in LRA, for example, to favor copy destination with > the first operand to improve some regularity for human eyes. Unfortunately there is no alternative today. The allocator always prefers copies to the first dead operand - there is nothing you can do about it (reordering operands isn't possible in most patterns). Wilco
