The following patch improves both the speed and code size for 64 bit addition
for RL78:
it emits a library function call instead of emitting code for the 64 bit add
for every single addition.
The addition function which was added in libgcc is hand written, so more
optimal than what GCC generates.
The change can easily be seen on the following test case.
long long my_adddi3(long long a, long long b)
{
return a + b;
}
I did not add this to the regression as it very simple and there are many test
cases in the regression which test this, for example
gcc.c-torture/execute/20090711-1.c and gcc.c-torture/execute/20091229-1.c and
so on.
Regression test is OK, tested with the following command:
make -k check-gcc RUNTESTFLAGS=--target_board=rl78-sim
Please let me know if this is OK, Thank you!
Sebastian
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog(revision 251091)
+++ gcc/ChangeLog(working copy)
@@ -1,3 +1,12 @@
+2017-08-14 Sebastian Perta <sebastian.pe...@renesas.com>
+
+changed long long addition for RL78
+* gcc/config/rl78/rl78.c (rl78_emit_libcall): new function.
+* gcc/config/rl78/rl78-protos.h (rl78_emit_libcall): new function.
+* gcc/config/rl78/rl78.md: new define_expand "adddi3".
+* libgcc/config/rl78/adddi3.S: new assembly file.
+* libgcc/config/rl78/t-rl78: added adddi3.S to LIB2ADD.
+
2017-08-14 Bin Cheng <bin.ch...@arm.com>
PR tree-optimization/81799
Index: gcc/config/rl78/rl78-protos.h
===================================================================
--- gcc/config/rl78/rl78-protos.h(revision 251091)
+++ gcc/config/rl78/rl78-protos.h(working copy)
@@ -56,3 +56,13 @@
int, int, int);
intrl78_one_far_p (rtx *operands, int num_operands);
+
+#ifdef RTX_CODE
+#ifdef HAVE_MACHINE_MODES
+
+rtx rl78_emit_libcall (const char*, enum rtx_code,
+ enum machine_mode, enum machine_mode,
+ int, rtx*);
+
+#endif
+#endif
Index: gcc/config/rl78/rl78.c
===================================================================
--- gcc/config/rl78/rl78.c(revision 251091)
+++ gcc/config/rl78/rl78.c(working copy)
@@ -4791,4 +4791,43 @@
struct gcc_target targetm = TARGET_INITIALIZER;
+rtx
+rl78_emit_libcall (const char *name, enum rtx_code code,
+ enum machine_mode dmode, enum machine_mode smode,
+ int noperands, rtx *operands)
+{
+ rtx ret;
+ rtx_insn *insns;
+ rtx libcall;
+ rtx equiv;
+
+ start_sequence ();
+ libcall = gen_rtx_SYMBOL_REF (Pmode, name);
+
+ switch (noperands)
+ {
+ case 2:
+ ret = emit_library_call_value (libcall, NULL_RTX, LCT_CONST,
+ dmode, 1, operands[1], smode);
+ equiv = gen_rtx_fmt_e (code, dmode, operands[1]);
+ break;
+
+ case 3:
+ ret = emit_library_call_value (libcall, NULL_RTX,
+ LCT_CONST, dmode, 2,
+ operands[1], smode, operands[2],
+ smode);
+ equiv = gen_rtx_fmt_ee (code, dmode, operands[1], operands[2]);
+ break;
+
+ default:
+ gcc_unreachable ();
+ }
+
+ insns = get_insns ();
+ end_sequence ();
+ emit_libcall_block (insns, operands[0], ret, equiv);
+ return ret;
+}
+
#include "gt-rl78.h"
Index: gcc/config/rl78/rl78.md
===================================================================
--- gcc/config/rl78/rl78.md(revision 251091)
+++ gcc/config/rl78/rl78.md(working copy)
@@ -224,6 +224,16 @@
DONE;"
)
+(define_expand "adddi3"
+ [(set (match_operand:DI 0 "nonimmediate_operand" "")
+ (plus:DI (match_operand:DI 1 "general_operand" "")
+ (match_operand:DI 2 "general_operand" "")))
+ ]
+ ""
+ "rl78_emit_libcall (\"__adddi3\", PLUS, DImode, DImode, 3, operands);
+ DONE;"
+)
+
(define_insn "addsi3_internal_virt"
[(set (match_operand:SI 0 "nonimmediate_operand" "=v,&vm, vm")
(plus:SI (match_operand:SI 1 "general_operand" "0, vim, vim")
Index: libgcc/config/rl78/adddi3.S
===================================================================
--- libgcc/config/rl78/adddi3.S(nonexistent)
+++ libgcc/config/rl78/adddi3.S(working copy)
@@ -0,0 +1,58 @@
+; Copyright (C) 2017 Free Software Foundation, Inc.
+; Contributed by Sebastian Perta.
+;
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+;
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+; General Public License for more details.
+;
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+; <http://www.gnu.org/licenses/>.
+
+
+#include "vregs.h"
+
+ .text
+
+START_FUNC ___adddi3
+
+ movw hl, sp ; use HL-based addressing (allows for direct addw)
+
+ movw ax, [hl+4]
+ addw ax, [hl+12]
+ movw r8, ax
+
+ mov a, [hl+6] ; middle bytes of the result are determined using 8-bit
+ addc a, [hl+14] ; ADDC insns which both account for and update the
carry bit
+ mov r10, a ; (no ADDWC instruction is available)
+ mov a, [hl+7]
+ addc a, [hl+15]
+ mov r11, a
+
+ mov a, [hl+8]
+ addc a, [hl+16]
+ mov r12, a
+ mov a, [hl+9]
+ addc a, [hl+17]
+ mov r13, a
+
+ movw ax, [hl+10]
+ sknc ; account for the possible carry from the
+ incw ax ; latest 8-bit operation
+ addw ax, [hl+18]
+ movw r14, ax
+
+ ret
+
+END_FUNC ___adddi3
Index: libgcc/config/rl78/t-rl78
===================================================================
--- libgcc/config/rl78/t-rl78(revision 251091)
+++ libgcc/config/rl78/t-rl78(working copy)
@@ -30,7 +30,8 @@
$(srcdir)/config/rl78/bit-count.S \
$(srcdir)/config/rl78/fpbit-sf.S \
$(srcdir)/config/rl78/fpmath-sf.S \
-$(srcdir)/config/rl78/cmpsi2.S
+$(srcdir)/config/rl78/cmpsi2.S \
+$(srcdir)/config/rl78/adddi3.S
LIB2FUNCS_EXCLUDE = _clzhi2 _clzsi2 _ctzhi2 _ctzsi2 \
_popcounthi2 _popcountsi2 \
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
