On Fri, Jul 28, 2017 at 09:51:30AM +0200, Richard Biener wrote: > On Fri, Jul 28, 2017 at 1:21 AM, Michael Meissner > <meiss...@linux.vnet.ibm.com> wrote: > > This patches optimizes the PowerPC vector set operation for 64-bit doubles > > and > > longs where the elements in the vector set may have been extracted from > > another > > vector (PR target/81593): > > > > Here an an example: > > > > vector double > > test_vpasted (vector double high, vector double low) > > { > > vector double res; > > res[1] = high[1]; > > res[0] = low[0]; > > return res; > > } > > Interesting. We expand from > > <bb 2> [100.00%] [count: INV]: > _1 = BIT_FIELD_REF <high_4(D), 64, 64>; > res_6 = BIT_INSERT_EXPR <res_5(D), _1, 64 (64 bits)>; > _2 = BIT_FIELD_REF <low_7(D), 64, 0>; > res_8 = BIT_INSERT_EXPR <res_6, _2, 0 (64 bits)>; > return res_8; > > but ideally we'd pattern-match that to a VEC_PERM_EXPR. The bswap > pass looks like the canonical pass for this even though it's quite awkward > to fill this in. > > So a match.pd rule would work as well here - your ppc backend patterns > are v2df specific, right?
Both V2DF and V2DI. While it would be great to have a machine independent optimization, my patches would also work for PowerPC specific built-ins for vector extract and vector insert. Also my patches replaces an UNSPEC to create the vector with VEC_CONCAT. Thus work going on in for machine independent support should not preclude this patch from being accepted in the PowerPC backend. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797