On 7/21/17 4:51 PM, Andrew Pinski wrote: > So right now how TFmode is handled on AARCH64 not as a pair of 64bit > registers but rather one 128bit registers (qN registrer; the floating > point register and the SIMD register set on AARCH64 overlap already). > So handling TDmode like TFmode is more natural for AARCH64 than most > arch. that the DFP hw support for _Decimal128 on AARCH64 would take > the values in the qN register rather than a pair of registers.
Ah, lucky you! Then nevermind. :-) Peter
