This patch serie adds support for the SPARC M8 processor to GCC.
The SPARC M8 processor implements the Oracle SPARC Architecture 2017.
The first four patches are preparatory work:
- bmask* instructions are put in their own instruction type. It makes
little sense to have them in the same category than array
instructions.
- Similarly, VIS compare instructions are put in their own instruction
type. This is to better accommodate subtypes, which are not quite
the same than the subtypes of `visl' instructions.
- The introduction of a new `subtype' insn attribute in sparc.md
avoids the need for adjusting the instruction scheduler DFAs for
previous cpu models every time a new cpu is introduced.
- The full set of SPARC instructions used in sparc.md, and their
position in the type/subtype hierarchy, is documented in a comment.
This eases the modification of the DFA schedulers, and the addition
of new cpus.
- The M7 DFA scheduler is reworked:
+ To use the new type/subtype hierarchy.
+ The v3pipe insn attribute is no longer needed.
+ More accurate latencies for instructions.
+ The C4 core pipeline is documented in a comment in niagara7.md.
The next three patches introduce M8 support proper:
- Support for -mcpu=m8 (we are thus suggesting to abandon the niagaraN
denomination for M8 and later processors.)
- Support for a new VIS level, VIS4B, covering the new VIS
instructions introduced in OSA2017 and implemented in the M8. Also
built-ins.
Note that no new VIS level was formally introduced in OSA2017, even
if many new VIS instructions were added to the spec. We introduced
VIS4B for coherence (like availability of builtins and visintrin.h
depending on the value of __VIS__) and avoided using VIS5 in case it
is introduced in future versions of the Oracle SPARC Architecture.
- A M8 DFA scheduler:
+ Also based on the new type/subtype hierarchy.
+ The functional units in the C5 core are explicitly documented in a
comment in m8.md.
See the individual patch descriptions for more information and
associated ChangeLog entries.
After this serie gets integrated upstream we will be contributing more
support for M8 capabilities, such as support for using the new
misaligned load/store instructions for memory accesses known to be
misaligned at compile-time.
Note that full binutils support for M8 was upstreamed in May 19.
Bootstrapped and tested in sparc64-linux-gnu. No regressions.
Jose E. Marchesi (7):
sparc: put bmask* instructions in it's own insn type and adjust DFAs
sparc: put VIS compare instructions in it's own insn type and adjust
DFAs
sparc: introduce insn subtypes
sparc: reworked M7 DFA based on instruction subtypes
sparc: basic support for the SPARC M8 cpu
sparc: support for VIS4B instructions
sparc: M8 DFA scheduler
gcc/ChangeLog | 226 +++++++++++++++++
gcc/config.gcc | 2 +-
gcc/config.in | 4 +
gcc/config/sparc/constraints.md | 12 +-
gcc/config/sparc/driver-sparc.c | 1 +
gcc/config/sparc/m8.md | 242 ++++++++++++++++++
gcc/config/sparc/niagara.md | 2 +-
gcc/config/sparc/niagara2.md | 4 +-
gcc/config/sparc/niagara4.md | 7 +-
gcc/config/sparc/niagara7.md | 181 +++++++++-----
gcc/config/sparc/predicates.md | 27 +++
gcc/config/sparc/sol2.h | 14 +-
gcc/config/sparc/sparc-c.c | 7 +-
gcc/config/sparc/sparc-opts.h | 1 +
gcc/config/sparc/sparc.c | 312 ++++++++++++++++++++++--
gcc/config/sparc/sparc.h | 20 +-
gcc/config/sparc/sparc.md | 364 +++++++++++++++++++++-------
gcc/config/sparc/sparc.opt | 7 +
gcc/config/sparc/ultra1_2.md | 8 +-
gcc/config/sparc/ultra3.md | 4 +-
gcc/configure | 35 +++
gcc/configure.ac | 12 +
gcc/doc/extend.texi | 39 +++
gcc/doc/invoke.texi | 25 +-
gcc/testsuite/ChangeLog | 8 +
gcc/testsuite/gcc.target/sparc/dictunpack.c | 25 ++
gcc/testsuite/gcc.target/sparc/fpcmpdeshl.c | 25 ++
gcc/testsuite/gcc.target/sparc/fpcmpshl.c | 81 +++++++
gcc/testsuite/gcc.target/sparc/fpcmpurshl.c | 25 ++
gcc/testsuite/gcc.target/sparc/fpcmpushl.c | 43 ++++
30 files changed, 1579 insertions(+), 184 deletions(-)
create mode 100644 gcc/config/sparc/m8.md
create mode 100644 gcc/testsuite/gcc.target/sparc/dictunpack.c
create mode 100644 gcc/testsuite/gcc.target/sparc/fpcmpdeshl.c
create mode 100644 gcc/testsuite/gcc.target/sparc/fpcmpshl.c
create mode 100644 gcc/testsuite/gcc.target/sparc/fpcmpurshl.c
create mode 100644 gcc/testsuite/gcc.target/sparc/fpcmpushl.c
--
2.3.4
