GCC Maintainers:
The support for vec_doublel () builtin didn't get re-tested on BE before
submission. The following buzilla was filed against the builtin
support.
Bug 80982 - gcc.target/powerpc/builtins-3-runnable.c fails starting with
its introduction in r248846.
The failure was due to GEN_INT (8) being out of bounds. Once that was
fixed, the order of the arguments also needed fixing to get the correct
result. These changes only apply to the BE code.
The following patch has been tested on powerpc64le-unknown-linux-gnu
(Power 8 LE) and on powerpc64-unknown-linux-gnu (Power 8 BE) with no
regressions.
Is the patch OK for gcc mainline?
Carl Love
-----------------------------------------------------
PR 80982 gcc.target/powerpc/builtins-3-runnable.c fails
starting with its introduction in r248846.
gcc/ChangeLog:
2017-06-07 Carl Love <c...@us.ibm.com>
PR target/80982
* config/rs6000/altivec.md: Fix the implementation of
(define_expand "doublel<mode>2" for BE.
---
gcc/config/rs6000/altivec.md | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 9e592bc..487b9a4 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -3002,9 +3002,9 @@
emit_insn (gen_vsx_xxsldwi_<mode> (rtx_tmp, operands[1],
operands[1], rtx_val));
- rtx_val = GEN_INT (8);
- emit_insn (gen_vsx_xxsldwi_<mode> (rtx_tmp, rtx_tmp,
- operands[1],rtx_val));
+ rtx_val = GEN_INT (2);
+ emit_insn (gen_vsx_xxsldwi_<mode> (rtx_tmp, operands[1],
+ rtx_tmp, rtx_val));
emit_insn (gen_vsx_xvcv<VS_sxwsp>dp (operands[0], rtx_tmp));
}
else
--
1.9.1
