Prakhar Bahuguna <prakhar.bahug...@arm.com> writes: > On 31/05/2017 14:11:43, Richard Sandiford wrote: >> Prakhar Bahuguna <prakhar.bahug...@arm.com> writes: >> > On 31/05/2017 09:19:40, Richard Sandiford wrote: >> >> const_ints are supposed to be stored in sign-extended form, so a 32-bit >> >> integer with the MSB set should be 0xffffffff80000000|x instead of >> >> 0x80000000|x. It's a bug if you have one where that isn't true. >> >> >> >> In the patch it looks like this could come from: >> >> ...these two splits, where the GEN_INTs should probably be: >> >> >> >> gen_int_mode (..., SImode); >> >> >> >> instead. >> > >> > Hi Richard, thanks for the tip. Is there a test case that could produce an >> > incorrect result? I've attempted to create one using negative doubles and >> > floats but haven't succeeded. >> >> Just to check, are you testing with --enable-checking=yes,rtl? >> >> When the values you tried were split, did you get the sign-extended form >> or the zero-extended form? >> >> Thanks, >> Richard > > I've now rebuilt with --enable-checking=yes,rtl and it appears that the split > values are being correctly sign-extended in the rtl and appear correctly in > the > assembly. > > However, if you believe it is safer to use gen_int_mode(), I'll respin the > patch accordingly.
Yeah, I think it would be safer. But if they were already correctly sign-extended, then what did you mean by: Also the pattern for splitting 32-bit immediates had to be changed, it was not accepting unsigned 32-bit unsigned integers with the MSB set. I believe const_int_operand expects the mode of the operand to be set to VOIDmode and not SImode. I have only changed it in the patterns that were affecting this code, though I suggest looking into changing it in the rest of the ARM backend. Thanks, Richard
