Hi,

On 16 May 2017 at 10:48, Tamar Christina <tamar.christ...@arm.com> wrote:
> Hi Kyrill,
>>
>> Sorry for missing this.
>> For the record you are referring to the patch at:
>> https://gcc.gnu.org/ml/gcc-patches/2016-09/msg01700.html
>>
>> This is ok and in line with what we do for the f32 intrinsics.
>> My only concern was that we can do this only if
>> __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
>> is defined from the architecture/fpu level, but these intrinsics are already
>> gated on that in arm_neon.h.
>>
>> This is ok for trunk if a bootstrap and test run on arm-none-linux-gnueabihf
>> with current trunk shows no issues.
>
> Thanks, bootstrapped and regtested now on arm-none-linux-gnueabihf and no 
> issues.
> I'll go ahead and commit then.
>

One of the new tests fails on arm-none-linux-gnueabi (non-hf) targets:
FAIL:    gcc.target/arm/armv8_2-fp16-neon-2.c scan-assembler-times
vceq\\.f16\\td[0-9]+, d[0-0]+, #0 1

For instance when configured --with-cpu=cortex-a9.

Christophe


> Regards,
> Tamar
>
>>
>> Thanks,
>> Kyrill
>>
>> > Tamar
>> > ________________________________________
>> > From: gcc-patches-ow...@gcc.gnu.org <gcc-patches-ow...@gcc.gnu.org>
>> on
>> > behalf of Matthew Wahab <matthew.wa...@foss.arm.com>
>> > Sent: Friday, September 23, 2016 4:02 PM
>> > To: gcc-patches
>> > Subject: [ARM] Enable FP16 vector arithmetic operations.
>> >
>> > Hello,
>> >
>> > Support for the ARMv8.2-A FP16 NEON arithmetic instructions was added
>> > using non-standard names for the instruction patterns. This was needed
>> > because the NEON floating point semantics meant that their use by the
>> > compiler for HFmode arithmetic operations needed to be restricted.
>> > This follows the implementation for 32-bit NEON intructions.
>> >
>> > As with the 32-bit instructions, the restriction on the HFmode
>> > operation can be lifted when -funsafe-math-optimizations is enabled.
>> > This patch does that, defining the standard pattern names addhf3,
>> > subhf3, mulhf3 and fmahf3.
>> >
>> > This patch also updates the NEON intrinsics to use the arithmetic
>> > operations when -ffast-math is enabled. This is to make keep the
>> > 16-bit support consistent with the 32-bit supportd. It is needed so
>> > that code using the f16 intrinsics are subject to the same
>> > optimizations as code using the f32 intrinsics would be.
>> >
>> > Tested for arm-none-linux-gnueabihf with native bootstrap and make
>> > check on ARMv8-A and for arm-none-eabi and armeb-none-eabi with
>> > cross-compiled make check on an ARMv8.2-A emulator.
>> >
>> > Ok for trunk?
>> > Matthew
>> >
>> > gcc/
>> > 2016-09-23  Matthew Wahab  <matthew.wa...@arm.com>
>> >
>> >         * config/arm/arm_neon.h (vadd_f16): Use standard arithmetic
>> >         operations in fast-math mode.
>> >         (vaddq_f16): Likewise.
>> >         (vmul_f16): Likewise.
>> >         (vmulq_f16): Likewise.
>> >         (vsub_f16): Likewise.
>> >         (vsubq_f16): Likewise.
>> >         * config/arm/neon.md (add<mode>3): New.
>> >         (sub<mode>3): New.
>> >         (fma:<VH:mode>3): New.  Also remove outdated comment.
>> >         (mul<mode>3): New.
>> >
>> > testsuite/
>> > 2016-09-23  Matthew Wahab  <matthew.wa...@arm.com>
>> >
>> >         * gcc.target/arm/armv8_2-fp16-arith-1.c: Expand comment.  Update
>> >         expected output of vadd, vsub and vmul instructions.
>> >         * gcc.target/arm/armv8_2-fp16-arith-2.c: New.
>> >         * gcc.target/arm/armv8_2-fp16-neon-2.c: New.
>> >         * gcc.target/arm/armv8_2-fp16-neon-3.c: New.
>

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