Hello!
With proper pattern shadowing, we don't need UNSPEC_NOREX_MEM tag.
2017-04-21 Uros Bizjak <ubiz...@gmail.com>
* config/i386/i386.md (*extzvqi_mem_rex64): Move above *extzv<mode>.
Remove UNSPEC_NOREX_MEM tag. Update corresponding peephole2 pattern.
(*insvqi_1_mem_rex64): Move above insv<mode>_1. Remove
UNSPEC_NOREX_MEM tag. Update corresponding peephole2 pattern.
(UNSPEC_NOREX_MEM): Remove definition.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN.
Uros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 1a902ee..616a0b7 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -114,7 +114,6 @@
UNSPEC_STOS
UNSPEC_PEEPSIB
UNSPEC_INSN_FALSE_DEP
- UNSPEC_NOREX_MEM
;; For SSE/MMX support:
UNSPEC_FIX_NOTRUNC
@@ -2808,28 +2807,27 @@
operands[1] = copy_to_reg (operands[1]);
})
-(define_insn "*extzv<mode>"
- [(set (match_operand:SWI248 0 "register_operand" "=R")
- (zero_extract:SWI248 (match_operand 1 "ext_register_operand" "Q")
- (const_int 8)
- (const_int 8)))]
- ""
- "movz{bl|x}\t{%h1, %k0|%k0, %h1}"
- [(set_attr "type" "imovx")
- (set_attr "mode" "SI")])
-
(define_insn "*extzvqi_mem_rex64"
[(set (match_operand:QI 0 "norex_memory_operand" "=Bn")
(subreg:QI
(zero_extract:SI (match_operand 1 "ext_register_operand" "Q")
(const_int 8)
- (const_int 8)) 0))
- (unspec [(const_int 0)] UNSPEC_NOREX_MEM)]
+ (const_int 8)) 0))]
"TARGET_64BIT && reload_completed"
"mov{b}\t{%h1, %0|%0, %h1}"
[(set_attr "type" "imov")
(set_attr "mode" "QI")])
+(define_insn "*extzv<mode>"
+ [(set (match_operand:SWI248 0 "register_operand" "=R")
+ (zero_extract:SWI248 (match_operand 1 "ext_register_operand" "Q")
+ (const_int 8)
+ (const_int 8)))]
+ ""
+ "movz{bl|x}\t{%h1, %k0|%k0, %h1}"
+ [(set_attr "type" "imovx")
+ (set_attr "mode" "SI")])
+
(define_insn "*extzvqi"
[(set (match_operand:QI 0 "nonimmediate_operand" "=QBc,?R,m")
(subreg:QI
@@ -2867,13 +2865,11 @@
(set (match_operand:QI 2 "norex_memory_operand") (match_dup 0))]
"TARGET_64BIT
&& peep2_reg_dead_p (2, operands[0])"
- [(parallel
- [(set (match_dup 2)
- (subreg:QI
- (zero_extract:SI (match_dup 1)
- (const_int 8)
- (const_int 8)) 0))
- (unspec [(const_int 0)] UNSPEC_NOREX_MEM)])])
+ [(set (match_dup 2)
+ (subreg:QI
+ (zero_extract:SI (match_dup 1)
+ (const_int 8)
+ (const_int 8)) 0))])
(define_expand "insv<mode>"
[(set (zero_extract:SWI248 (match_operand:SWI248 0 "register_operand")
@@ -2908,6 +2904,17 @@
DONE;
})
+(define_insn "*insvqi_1_mem_rex64"
+ [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q")
+ (const_int 8)
+ (const_int 8))
+ (subreg:SI
+ (match_operand:QI 1 "norex_memory_operand" "Bn") 0))]
+ "TARGET_64BIT && reload_completed"
+ "mov{b}\t{%1, %h0|%h0, %1}"
+ [(set_attr "type" "imov")
+ (set_attr "mode" "QI")])
+
(define_insn "insv<mode>_1"
[(set (zero_extract:SWI248 (match_operand 0 "ext_register_operand" "+Q,Q")
(const_int 8)
@@ -2923,18 +2930,6 @@
(set_attr "type" "imov")
(set_attr "mode" "QI")])
-(define_insn "*insvqi_1_mem_rex64"
- [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q")
- (const_int 8)
- (const_int 8))
- (subreg:SI
- (match_operand:QI 1 "norex_memory_operand" "Bn") 0))
- (unspec [(const_int 0)] UNSPEC_NOREX_MEM)]
- "TARGET_64BIT && reload_completed"
- "mov{b}\t{%1, %h0|%h0, %1}"
- [(set_attr "type" "imov")
- (set_attr "mode" "QI")])
-
(define_insn "*insvqi_1"
[(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q,Q")
(const_int 8)
@@ -2956,12 +2951,10 @@
(subreg:SI (match_dup 0) 0))]
"TARGET_64BIT
&& peep2_reg_dead_p (2, operands[0])"
- [(parallel
- [(set (zero_extract:SI (match_dup 2)
- (const_int 8)
- (const_int 8))
- (subreg:SI (match_dup 1) 0))
- (unspec [(const_int 0)] UNSPEC_NOREX_MEM)])])
+ [(set (zero_extract:SI (match_dup 2)
+ (const_int 8)
+ (const_int 8))
+ (subreg:SI (match_dup 1) 0))])
(define_code_iterator any_extract [sign_extract zero_extract])
