On Mon, Apr 10, 2017 at 10:46 PM, Jakub Jelinek <ja...@redhat.com> wrote:
> Hi!
>
> As mentioned in the PR, apparently we have some specific handling for
> the MMX/SSE/AVX2 shift builtins with *_COUNT function type aliases,
> where the count argument (last == second) is not really required to be
> constant e.g. for the srai/srli/slli builtins, and is converted as needed.
>
> This patch adds similar handling also to the AVX512* 4 argument shifts
> where the count is 2nd argument, followed by value for masked off elts
> and mask. While the intrinsic docs are ambiguous on if they allow
> non-constant immediates or not, apparently what ICC implements matches
> what we do for the 2 arg builtins.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
> 2017-04-10 Jakub Jelinek <ja...@redhat.com>
>
> PR target/80381
> * config/i386/i386-builtin-types.def
> (V16HI_FTYPE_V16HI_INT_V16HI_UHI_COUNT,
> V16HI_FTYPE_V16HI_V8HI_V16HI_UHI_COUNT,
> V16SI_FTYPE_V16SI_INT_V16SI_UHI_COUNT,
> V16SI_FTYPE_V16SI_V4SI_V16SI_UHI_COUNT,
> V2DI_FTYPE_V2DI_INT_V2DI_UQI_COUNT,
> V2DI_FTYPE_V2DI_V2DI_V2DI_UQI_COUNT,
> V32HI_FTYPE_V32HI_INT_V32HI_USI_COUNT,
> V32HI_FTYPE_V32HI_V8HI_V32HI_USI_COUNT,
> V4DI_FTYPE_V4DI_INT_V4DI_UQI_COUNT,
> V4DI_FTYPE_V4DI_V2DI_V4DI_UQI_COUNT,
> V4SI_FTYPE_V4SI_INT_V4SI_UQI_COUNT,
> V4SI_FTYPE_V4SI_V4SI_V4SI_UQI_COUNT,
> V8DI_FTYPE_V8DI_INT_V8DI_UQI_COUNT,
> V8DI_FTYPE_V8DI_V2DI_V8DI_UQI_COUNT,
> V8HI_FTYPE_V8HI_INT_V8HI_UQI_COUNT,
> V8HI_FTYPE_V8HI_V8HI_V8HI_UQI_COUNT,
> V8SI_FTYPE_V8SI_INT_V8SI_UQI_COUNT,
> V8SI_FTYPE_V8SI_V4SI_V8SI_UQI_COUNT): New function type aliases.
> * config/i386/i386-builtin.def (__builtin_ia32_pslld512_mask,
> __builtin_ia32_pslldi512_mask, __builtin_ia32_psllq512_mask,
> __builtin_ia32_psllqi512_mask, __builtin_ia32_psrad512_mask,
> __builtin_ia32_psradi512_mask, __builtin_ia32_psraq512_mask,
> __builtin_ia32_psraqi512_mask, __builtin_ia32_psrld512_mask,
> __builtin_ia32_psrldi512_mask, __builtin_ia32_psrlq512_mask,
> __builtin_ia32_psrlqi512_mask, __builtin_ia32_psllwi128_mask,
> __builtin_ia32_pslldi128_mask, __builtin_ia32_psllqi128_mask,
> __builtin_ia32_psllw128_mask, __builtin_ia32_pslld128_mask,
> __builtin_ia32_psllq128_mask, __builtin_ia32_psllwi256_mask,
> __builtin_ia32_psllw256_mask, __builtin_ia32_pslldi256_mask,
> __builtin_ia32_pslld256_mask, __builtin_ia32_psllqi256_mask,
> __builtin_ia32_psllq256_mask, __builtin_ia32_psradi128_mask,
> __builtin_ia32_psrad128_mask, __builtin_ia32_psradi256_mask,
> __builtin_ia32_psrad256_mask, __builtin_ia32_psraqi128_mask,
> __builtin_ia32_psraq128_mask, __builtin_ia32_psraqi256_mask,
> __builtin_ia32_psraq256_mask, __builtin_ia32_psrldi128_mask,
> __builtin_ia32_psrld128_mask, __builtin_ia32_psrldi256_mask,
> __builtin_ia32_psrld256_mask, __builtin_ia32_psrlqi128_mask,
> __builtin_ia32_psrlq128_mask, __builtin_ia32_psrlqi256_mask,
> __builtin_ia32_psrlq256_mask, __builtin_ia32_psrawi256_mask,
> __builtin_ia32_psraw256_mask, __builtin_ia32_psrawi128_mask,
> __builtin_ia32_psraw128_mask, __builtin_ia32_psrlwi256_mask,
> __builtin_ia32_psrlw256_mask, __builtin_ia32_psrlwi128_mask,
> __builtin_ia32_psrlw128_mask, __builtin_ia32_psllwi512_mask,
> __builtin_ia32_psllw512_mask, __builtin_ia32_psrawi512_mask,
> __builtin_ia32_psraw512_mask, __builtin_ia32_psrlwi512_mask,
> __builtin_ia32_psrlw512_mask): Use _COUNT suffixed function type
> aliases.
> * config/i386/i386.c (ix86_expand_args_builtin): Rename last_arg_count
> flag to second_arg_count, handle 4 argument function type _COUNT
> aliases, handle second_arg_count on second argument rather than last.
>
> * gcc.target/i386/pr80381.c: New test.
OK.
Thanks,
Uros.
> --- gcc/config/i386/i386-builtin-types.def.jj 2017-01-21 02:26:29.000000000
> +0100
> +++ gcc/config/i386/i386-builtin-types.def 2017-04-10 17:32:39.845594182
> +0200
> @@ -1146,6 +1146,24 @@ DEF_FUNCTION_TYPE_ALIAS (V8SI_FTYPE_V8SI
> DEF_FUNCTION_TYPE_ALIAS (V8SI_FTYPE_V8SI_V4SI, COUNT)
> DEF_FUNCTION_TYPE_ALIAS (V4DI_FTYPE_V4DI_INT, COUNT)
> DEF_FUNCTION_TYPE_ALIAS (V4DI_FTYPE_V4DI_V2DI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V16HI_FTYPE_V16HI_INT_V16HI_UHI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V16HI_FTYPE_V16HI_V8HI_V16HI_UHI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V16SI_FTYPE_V16SI_INT_V16SI_UHI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V16SI_FTYPE_V16SI_V4SI_V16SI_UHI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V2DI_FTYPE_V2DI_INT_V2DI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V2DI_FTYPE_V2DI_V2DI_V2DI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V32HI_FTYPE_V32HI_INT_V32HI_USI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V32HI_FTYPE_V32HI_V8HI_V32HI_USI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V4DI_FTYPE_V4DI_INT_V4DI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V4DI_FTYPE_V4DI_V2DI_V4DI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V4SI_FTYPE_V4SI_INT_V4SI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V4SI_FTYPE_V4SI_V4SI_V4SI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V8DI_FTYPE_V8DI_INT_V8DI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V8DI_FTYPE_V8DI_V2DI_V8DI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V8HI_FTYPE_V8HI_INT_V8HI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V8HI_FTYPE_V8HI_V8HI_V8HI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V8SI_FTYPE_V8SI_INT_V8SI_UQI, COUNT)
> +DEF_FUNCTION_TYPE_ALIAS (V8SI_FTYPE_V8SI_V4SI_V8SI_UQI, COUNT)
>
> DEF_FUNCTION_TYPE_ALIAS (V2DF_FTYPE_V2DF_V2DF, SWAP)
> DEF_FUNCTION_TYPE_ALIAS (V4SF_FTYPE_V4SF_V4SF, SWAP)
> --- gcc/config/i386/i386-builtin.def.jj 2017-02-20 13:51:22.000000000 +0100
> +++ gcc/config/i386/i386-builtin.def 2017-04-10 17:20:31.773318048 +0200
> @@ -1338,22 +1338,22 @@ BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR
> BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_rorvv16si_mask,
> "__builtin_ia32_prorvd512_mask", IX86_BUILTIN_PRORVD512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
> BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_rorvv8di_mask,
> "__builtin_ia32_prorvq512_mask", IX86_BUILTIN_PRORVQ512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_V8DI_UQI)
> BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_pshufdv3_mask,
> "__builtin_ia32_pshufd512_mask", IX86_BUILTIN_PSHUFD512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_INT_V16SI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashlv16si3_mask,
> "__builtin_ia32_pslld512_mask", IX86_BUILTIN_PSLLD512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V4SI_V16SI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashlv16si3_mask,
> "__builtin_ia32_pslldi512_mask", IX86_BUILTIN_PSLLDI512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_INT_V16SI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashlv8di3_mask,
> "__builtin_ia32_psllq512_mask", IX86_BUILTIN_PSLLQ512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V2DI_V8DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashlv8di3_mask,
> "__builtin_ia32_psllqi512_mask", IX86_BUILTIN_PSLLQI512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_INT_V8DI_UQI)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashlv16si3_mask,
> "__builtin_ia32_pslld512_mask", IX86_BUILTIN_PSLLD512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V4SI_V16SI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashlv16si3_mask,
> "__builtin_ia32_pslldi512_mask", IX86_BUILTIN_PSLLDI512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_INT_V16SI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashlv8di3_mask,
> "__builtin_ia32_psllq512_mask", IX86_BUILTIN_PSLLQ512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V2DI_V8DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashlv8di3_mask,
> "__builtin_ia32_psllqi512_mask", IX86_BUILTIN_PSLLQI512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_INT_V8DI_UQI_COUNT)
> BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_ashlvv16si_mask,
> "__builtin_ia32_psllv16si_mask", IX86_BUILTIN_PSLLVV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
> BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_ashlvv8di_mask,
> "__builtin_ia32_psllv8di_mask", IX86_BUILTIN_PSLLVV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_V8DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashrv16si3_mask,
> "__builtin_ia32_psrad512_mask", IX86_BUILTIN_PSRAD512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V4SI_V16SI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashrv16si3_mask,
> "__builtin_ia32_psradi512_mask", IX86_BUILTIN_PSRADI512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_INT_V16SI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashrv8di3_mask,
> "__builtin_ia32_psraq512_mask", IX86_BUILTIN_PSRAQ512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V2DI_V8DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashrv8di3_mask,
> "__builtin_ia32_psraqi512_mask", IX86_BUILTIN_PSRAQI512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_INT_V8DI_UQI)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashrv16si3_mask,
> "__builtin_ia32_psrad512_mask", IX86_BUILTIN_PSRAD512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V4SI_V16SI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashrv16si3_mask,
> "__builtin_ia32_psradi512_mask", IX86_BUILTIN_PSRADI512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_INT_V16SI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashrv8di3_mask,
> "__builtin_ia32_psraq512_mask", IX86_BUILTIN_PSRAQ512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V2DI_V8DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_ashrv8di3_mask,
> "__builtin_ia32_psraqi512_mask", IX86_BUILTIN_PSRAQI512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_INT_V8DI_UQI_COUNT)
> BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_ashrvv16si_mask,
> "__builtin_ia32_psrav16si_mask", IX86_BUILTIN_PSRAVV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
> BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_ashrvv8di_mask,
> "__builtin_ia32_psrav8di_mask", IX86_BUILTIN_PSRAVV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_V8DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_lshrv16si3_mask,
> "__builtin_ia32_psrld512_mask", IX86_BUILTIN_PSRLD512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V4SI_V16SI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_lshrv16si3_mask,
> "__builtin_ia32_psrldi512_mask", IX86_BUILTIN_PSRLDI512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_INT_V16SI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_lshrv8di3_mask,
> "__builtin_ia32_psrlq512_mask", IX86_BUILTIN_PSRLQ512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V2DI_V8DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_lshrv8di3_mask,
> "__builtin_ia32_psrlqi512_mask", IX86_BUILTIN_PSRLQI512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_INT_V8DI_UQI)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_lshrv16si3_mask,
> "__builtin_ia32_psrld512_mask", IX86_BUILTIN_PSRLD512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V4SI_V16SI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_lshrv16si3_mask,
> "__builtin_ia32_psrldi512_mask", IX86_BUILTIN_PSRLDI512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_INT_V16SI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_lshrv8di3_mask,
> "__builtin_ia32_psrlq512_mask", IX86_BUILTIN_PSRLQ512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V2DI_V8DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_lshrv8di3_mask,
> "__builtin_ia32_psrlqi512_mask", IX86_BUILTIN_PSRLQI512, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_INT_V8DI_UQI_COUNT)
> BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_lshrvv16si_mask,
> "__builtin_ia32_psrlv16si_mask", IX86_BUILTIN_PSRLVV16SI, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
> BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_lshrvv8di_mask,
> "__builtin_ia32_psrlv8di_mask", IX86_BUILTIN_PSRLVV8DI, UNKNOWN, (int)
> V8DI_FTYPE_V8DI_V8DI_V8DI_UQI)
> BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_subv16si3_mask,
> "__builtin_ia32_psubd512_mask", IX86_BUILTIN_PSUBD512, UNKNOWN, (int)
> V16SI_FTYPE_V16SI_V16SI_V16SI_UHI)
> @@ -1783,36 +1783,36 @@ BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION
> BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_sse2_andnotv2df3_mask, "__builtin_ia32_andnpd128_mask",
> IX86_BUILTIN_ANDNPD128_MASK, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF_UQI)
> BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_avx_andnotv8sf3_mask, "__builtin_ia32_andnps256_mask",
> IX86_BUILTIN_ANDNPS256_MASK, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI)
> BDESC (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_sse_andnotv4sf3_mask, "__builtin_ia32_andnps128_mask",
> IX86_BUILTIN_ANDNPS128_MASK, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashlv8hi3_mask, "__builtin_ia32_psllwi128_mask",
> IX86_BUILTIN_PSLLWI128_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_INT_V8HI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv4si3_mask,
> "__builtin_ia32_pslldi128_mask", IX86_BUILTIN_PSLLDI128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_INT_V4SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv2di3_mask,
> "__builtin_ia32_psllqi128_mask", IX86_BUILTIN_PSLLQI128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_INT_V2DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashlv8hi3_mask, "__builtin_ia32_psllw128_mask",
> IX86_BUILTIN_PSLLW128_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv4si3_mask,
> "__builtin_ia32_pslld128_mask", IX86_BUILTIN_PSLLD128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv2di3_mask,
> "__builtin_ia32_psllq128_mask", IX86_BUILTIN_PSLLQ128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashlv16hi3_mask, "__builtin_ia32_psllwi256_mask",
> IX86_BUILTIN_PSLLWI256_MASK , UNKNOWN, (int) V16HI_FTYPE_V16HI_INT_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashlv16hi3_mask, "__builtin_ia32_psllw256_mask",
> IX86_BUILTIN_PSLLW256_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V8HI_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv8si3_mask,
> "__builtin_ia32_pslldi256_mask", IX86_BUILTIN_PSLLDI256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_INT_V8SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv8si3_mask,
> "__builtin_ia32_pslld256_mask", IX86_BUILTIN_PSLLD256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V4SI_V8SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv4di3_mask,
> "__builtin_ia32_psllqi256_mask", IX86_BUILTIN_PSLLQI256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_INT_V4DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv4di3_mask,
> "__builtin_ia32_psllq256_mask", IX86_BUILTIN_PSLLQ256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V2DI_V4DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv4si3_mask,
> "__builtin_ia32_psradi128_mask", IX86_BUILTIN_PSRADI128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_INT_V4SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv4si3_mask,
> "__builtin_ia32_psrad128_mask", IX86_BUILTIN_PSRAD128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv8si3_mask,
> "__builtin_ia32_psradi256_mask", IX86_BUILTIN_PSRADI256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_INT_V8SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv8si3_mask,
> "__builtin_ia32_psrad256_mask", IX86_BUILTIN_PSRAD256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V4SI_V8SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv2di3_mask,
> "__builtin_ia32_psraqi128_mask", IX86_BUILTIN_PSRAQI128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_INT_V2DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv2di3_mask,
> "__builtin_ia32_psraq128_mask", IX86_BUILTIN_PSRAQ128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv4di3_mask,
> "__builtin_ia32_psraqi256_mask", IX86_BUILTIN_PSRAQI256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_INT_V4DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv4di3_mask,
> "__builtin_ia32_psraq256_mask", IX86_BUILTIN_PSRAQ256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V2DI_V4DI_UQI)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashlv8hi3_mask, "__builtin_ia32_psllwi128_mask",
> IX86_BUILTIN_PSLLWI128_MASK, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_INT_V8HI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv4si3_mask,
> "__builtin_ia32_pslldi128_mask", IX86_BUILTIN_PSLLDI128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_INT_V4SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv2di3_mask,
> "__builtin_ia32_psllqi128_mask", IX86_BUILTIN_PSLLQI128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_INT_V2DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashlv8hi3_mask, "__builtin_ia32_psllw128_mask",
> IX86_BUILTIN_PSLLW128_MASK, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_V8HI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv4si3_mask,
> "__builtin_ia32_pslld128_mask", IX86_BUILTIN_PSLLD128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv2di3_mask,
> "__builtin_ia32_psllq128_mask", IX86_BUILTIN_PSLLQ128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashlv16hi3_mask, "__builtin_ia32_psllwi256_mask",
> IX86_BUILTIN_PSLLWI256_MASK , UNKNOWN, (int)
> V16HI_FTYPE_V16HI_INT_V16HI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashlv16hi3_mask, "__builtin_ia32_psllw256_mask",
> IX86_BUILTIN_PSLLW256_MASK, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V8HI_V16HI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv8si3_mask,
> "__builtin_ia32_pslldi256_mask", IX86_BUILTIN_PSLLDI256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_INT_V8SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv8si3_mask,
> "__builtin_ia32_pslld256_mask", IX86_BUILTIN_PSLLD256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V4SI_V8SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv4di3_mask,
> "__builtin_ia32_psllqi256_mask", IX86_BUILTIN_PSLLQI256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_INT_V4DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashlv4di3_mask,
> "__builtin_ia32_psllq256_mask", IX86_BUILTIN_PSLLQ256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V2DI_V4DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv4si3_mask,
> "__builtin_ia32_psradi128_mask", IX86_BUILTIN_PSRADI128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_INT_V4SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv4si3_mask,
> "__builtin_ia32_psrad128_mask", IX86_BUILTIN_PSRAD128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv8si3_mask,
> "__builtin_ia32_psradi256_mask", IX86_BUILTIN_PSRADI256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_INT_V8SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv8si3_mask,
> "__builtin_ia32_psrad256_mask", IX86_BUILTIN_PSRAD256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V4SI_V8SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv2di3_mask,
> "__builtin_ia32_psraqi128_mask", IX86_BUILTIN_PSRAQI128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_INT_V2DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv2di3_mask,
> "__builtin_ia32_psraq128_mask", IX86_BUILTIN_PSRAQ128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv4di3_mask,
> "__builtin_ia32_psraqi256_mask", IX86_BUILTIN_PSRAQI256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_INT_V4DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_ashrv4di3_mask,
> "__builtin_ia32_psraq256_mask", IX86_BUILTIN_PSRAQ256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V2DI_V4DI_UQI_COUNT)
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_andv8si3_mask,
> "__builtin_ia32_pandd256_mask", IX86_BUILTIN_PANDD256, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_andv4si3_mask,
> "__builtin_ia32_pandd128_mask", IX86_BUILTIN_PANDD128, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv4si3_mask,
> "__builtin_ia32_psrldi128_mask", IX86_BUILTIN_PSRLDI128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_INT_V4SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv4si3_mask,
> "__builtin_ia32_psrld128_mask", IX86_BUILTIN_PSRLD128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv8si3_mask,
> "__builtin_ia32_psrldi256_mask", IX86_BUILTIN_PSRLDI256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_INT_V8SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv8si3_mask,
> "__builtin_ia32_psrld256_mask", IX86_BUILTIN_PSRLD256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V4SI_V8SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv2di3_mask,
> "__builtin_ia32_psrlqi128_mask", IX86_BUILTIN_PSRLQI128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_INT_V2DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv2di3_mask,
> "__builtin_ia32_psrlq128_mask", IX86_BUILTIN_PSRLQ128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv4di3_mask,
> "__builtin_ia32_psrlqi256_mask", IX86_BUILTIN_PSRLQI256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_INT_V4DI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv4di3_mask,
> "__builtin_ia32_psrlq256_mask", IX86_BUILTIN_PSRLQ256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V2DI_V4DI_UQI)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv4si3_mask,
> "__builtin_ia32_psrldi128_mask", IX86_BUILTIN_PSRLDI128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_INT_V4SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv4si3_mask,
> "__builtin_ia32_psrld128_mask", IX86_BUILTIN_PSRLD128_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv8si3_mask,
> "__builtin_ia32_psrldi256_mask", IX86_BUILTIN_PSRLDI256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_INT_V8SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv8si3_mask,
> "__builtin_ia32_psrld256_mask", IX86_BUILTIN_PSRLD256_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V4SI_V8SI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv2di3_mask,
> "__builtin_ia32_psrlqi128_mask", IX86_BUILTIN_PSRLQI128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_INT_V2DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv2di3_mask,
> "__builtin_ia32_psrlq128_mask", IX86_BUILTIN_PSRLQ128_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv4di3_mask,
> "__builtin_ia32_psrlqi256_mask", IX86_BUILTIN_PSRLQI256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_INT_V4DI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_lshrv4di3_mask,
> "__builtin_ia32_psrlq256_mask", IX86_BUILTIN_PSRLQ256_MASK, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V2DI_V4DI_UQI_COUNT)
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_andv4di3_mask,
> "__builtin_ia32_pandq256_mask", IX86_BUILTIN_PANDQ256, UNKNOWN, (int)
> V4DI_FTYPE_V4DI_V4DI_V4DI_UQI)
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_andv2di3_mask,
> "__builtin_ia32_pandq128_mask", IX86_BUILTIN_PANDQ128, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx2_andnotv8si3_mask,
> "__builtin_ia32_pandnd256_mask", IX86_BUILTIN_PANDND256, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
> @@ -1983,14 +1983,14 @@ BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FO
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx2_lshrvv2di_mask,
> "__builtin_ia32_psrlv2di_mask", IX86_BUILTIN_PSRLVV2DI_MASK, UNKNOWN, (int)
> V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx2_lshrvv8si_mask,
> "__builtin_ia32_psrlv8si_mask", IX86_BUILTIN_PSRLVV8SI_MASK, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx2_lshrvv4si_mask,
> "__builtin_ia32_psrlv4si_mask", IX86_BUILTIN_PSRLVV4SI_MASK, UNKNOWN, (int)
> V4SI_FTYPE_V4SI_V4SI_V4SI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashrv16hi3_mask, "__builtin_ia32_psrawi256_mask",
> IX86_BUILTIN_PSRAWI256_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_INT_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashrv16hi3_mask, "__builtin_ia32_psraw256_mask",
> IX86_BUILTIN_PSRAW256_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V8HI_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashrv8hi3_mask, "__builtin_ia32_psrawi128_mask",
> IX86_BUILTIN_PSRAWI128_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_INT_V8HI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashrv8hi3_mask, "__builtin_ia32_psraw128_mask",
> IX86_BUILTIN_PSRAW128_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_lshrv16hi3_mask, "__builtin_ia32_psrlwi256_mask",
> IX86_BUILTIN_PSRLWI256_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_INT_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_lshrv16hi3_mask, "__builtin_ia32_psrlw256_mask",
> IX86_BUILTIN_PSRLW256_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V8HI_V16HI_UHI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_lshrv8hi3_mask, "__builtin_ia32_psrlwi128_mask",
> IX86_BUILTIN_PSRLWI128_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_INT_V8HI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_lshrv8hi3_mask, "__builtin_ia32_psrlw128_mask",
> IX86_BUILTIN_PSRLW128_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashrv16hi3_mask, "__builtin_ia32_psrawi256_mask",
> IX86_BUILTIN_PSRAWI256_MASK, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_INT_V16HI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashrv16hi3_mask, "__builtin_ia32_psraw256_mask",
> IX86_BUILTIN_PSRAW256_MASK, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V8HI_V16HI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashrv8hi3_mask, "__builtin_ia32_psrawi128_mask",
> IX86_BUILTIN_PSRAWI128_MASK, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_INT_V8HI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_ashrv8hi3_mask, "__builtin_ia32_psraw128_mask",
> IX86_BUILTIN_PSRAW128_MASK, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_V8HI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_lshrv16hi3_mask, "__builtin_ia32_psrlwi256_mask",
> IX86_BUILTIN_PSRLWI256_MASK, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_INT_V16HI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_lshrv16hi3_mask, "__builtin_ia32_psrlw256_mask",
> IX86_BUILTIN_PSRLW256_MASK, UNKNOWN, (int)
> V16HI_FTYPE_V16HI_V8HI_V16HI_UHI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_lshrv8hi3_mask, "__builtin_ia32_psrlwi128_mask",
> IX86_BUILTIN_PSRLWI128_MASK, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_INT_V8HI_UQI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_lshrv8hi3_mask, "__builtin_ia32_psrlw128_mask",
> IX86_BUILTIN_PSRLW128_MASK, UNKNOWN, (int)
> V8HI_FTYPE_V8HI_V8HI_V8HI_UQI_COUNT)
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_rorvv8si_mask,
> "__builtin_ia32_prorvd256_mask", IX86_BUILTIN_PRORVD256, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_rolvv8si_mask,
> "__builtin_ia32_prolvd256_mask", IX86_BUILTIN_PROLVD256, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_V8SI_V8SI_UQI)
> BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_rorv8si_mask,
> "__builtin_ia32_prord256_mask", IX86_BUILTIN_PRORD256, UNKNOWN, (int)
> V8SI_FTYPE_V8SI_INT_V8SI_UQI)
> @@ -2307,8 +2307,8 @@ BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FO
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_umulv32hi3_highpart_mask,
> "__builtin_ia32_pmulhuw512_mask" , IX86_BUILTIN_PMULHUW512_MASK, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_smulv32hi3_highpart_mask,
> "__builtin_ia32_pmulhw512_mask" , IX86_BUILTIN_PMULHW512_MASK, UNKNOWN,
> (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_mulv32hi3_mask,
> "__builtin_ia32_pmullw512_mask", IX86_BUILTIN_PMULLW512_MASK, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_ashlv32hi3_mask,
> "__builtin_ia32_psllwi512_mask", IX86_BUILTIN_PSLLWI512_MASK, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_INT_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_ashlv32hi3_mask,
> "__builtin_ia32_psllw512_mask", IX86_BUILTIN_PSLLW512_MASK, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V8HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_ashlv32hi3_mask,
> "__builtin_ia32_psllwi512_mask", IX86_BUILTIN_PSLLWI512_MASK, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_INT_V32HI_USI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_ashlv32hi3_mask,
> "__builtin_ia32_psllw512_mask", IX86_BUILTIN_PSLLW512_MASK, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V8HI_V32HI_USI_COUNT)
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_packsswb_mask,
> "__builtin_ia32_packsswb512_mask", IX86_BUILTIN_PACKSSWB512, UNKNOWN, (int)
> V64QI_FTYPE_V32HI_V32HI_V64QI_UDI)
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_packuswb_mask,
> "__builtin_ia32_packuswb512_mask", IX86_BUILTIN_PACKUSWB512, UNKNOWN, (int)
> V64QI_FTYPE_V32HI_V32HI_V64QI_UDI)
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_ashrvv32hi_mask,
> "__builtin_ia32_psrav32hi_mask", IX86_BUILTIN_PSRAVV32HI, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
> @@ -2322,10 +2322,10 @@ BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FO
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_pshufbv64qi3_mask,
> "__builtin_ia32_pshufb512_mask", IX86_BUILTIN_PSHUFB512, UNKNOWN, (int)
> V64QI_FTYPE_V64QI_V64QI_V64QI_UDI)
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_pshufhwv32hi_mask,
> "__builtin_ia32_pshufhw512_mask", IX86_BUILTIN_PSHUFHW512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_INT_V32HI_USI)
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_pshuflwv32hi_mask,
> "__builtin_ia32_pshuflw512_mask", IX86_BUILTIN_PSHUFLW512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_INT_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_ashrv32hi3_mask,
> "__builtin_ia32_psrawi512_mask", IX86_BUILTIN_PSRAWI512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_INT_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_ashrv32hi3_mask,
> "__builtin_ia32_psraw512_mask", IX86_BUILTIN_PSRAW512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V8HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_lshrv32hi3_mask,
> "__builtin_ia32_psrlwi512_mask", IX86_BUILTIN_PSRLWI512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_INT_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_lshrv32hi3_mask,
> "__builtin_ia32_psrlw512_mask", IX86_BUILTIN_PSRLW512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V8HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_ashrv32hi3_mask,
> "__builtin_ia32_psrawi512_mask", IX86_BUILTIN_PSRAWI512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_INT_V32HI_USI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_ashrv32hi3_mask,
> "__builtin_ia32_psraw512_mask", IX86_BUILTIN_PSRAW512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V8HI_V32HI_USI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_lshrv32hi3_mask,
> "__builtin_ia32_psrlwi512_mask", IX86_BUILTIN_PSRLWI512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_INT_V32HI_USI_COUNT)
> +BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_lshrv32hi3_mask,
> "__builtin_ia32_psrlw512_mask", IX86_BUILTIN_PSRLW512, UNKNOWN, (int)
> V32HI_FTYPE_V32HI_V8HI_V32HI_USI_COUNT)
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_cvtb2maskv64qi,
> "__builtin_ia32_cvtb2mask512", IX86_BUILTIN_CVTB2MASK512, UNKNOWN, (int)
> UDI_FTYPE_V64QI)
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_cvtw2maskv32hi,
> "__builtin_ia32_cvtw2mask512", IX86_BUILTIN_CVTW2MASK512, UNKNOWN, (int)
> USI_FTYPE_V32HI)
> BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_cvtmask2bv64qi,
> "__builtin_ia32_cvtmask2b512", IX86_BUILTIN_CVTMASK2B512, UNKNOWN, (int)
> V64QI_FTYPE_UDI)
> --- gcc/config/i386/i386.c.jj 2017-04-07 11:46:48.000000000 +0200
> +++ gcc/config/i386/i386.c 2017-04-10 17:37:43.849834729 +0200
> @@ -34857,7 +34857,7 @@ ix86_expand_args_builtin (const struct b
> rtx op;
> machine_mode mode;
> } args[6];
> - bool last_arg_count = false;
> + bool second_arg_count = false;
> enum insn_code icode = d->icode;
> const struct insn_data_d *insn_p = &insn_data[icode];
> machine_mode tmode = insn_p->operand[0].mode;
> @@ -35093,7 +35093,28 @@ ix86_expand_args_builtin (const struct b
> case V1DI_FTYPE_V1DI_V1DI_COUNT:
> case V1DI_FTYPE_V1DI_SI_COUNT:
> nargs = 2;
> - last_arg_count = true;
> + second_arg_count = true;
> + break;
> + case V16HI_FTYPE_V16HI_INT_V16HI_UHI_COUNT:
> + case V16HI_FTYPE_V16HI_V8HI_V16HI_UHI_COUNT:
> + case V16SI_FTYPE_V16SI_INT_V16SI_UHI_COUNT:
> + case V16SI_FTYPE_V16SI_V4SI_V16SI_UHI_COUNT:
> + case V2DI_FTYPE_V2DI_INT_V2DI_UQI_COUNT:
> + case V2DI_FTYPE_V2DI_V2DI_V2DI_UQI_COUNT:
> + case V32HI_FTYPE_V32HI_INT_V32HI_USI_COUNT:
> + case V32HI_FTYPE_V32HI_V8HI_V32HI_USI_COUNT:
> + case V4DI_FTYPE_V4DI_INT_V4DI_UQI_COUNT:
> + case V4DI_FTYPE_V4DI_V2DI_V4DI_UQI_COUNT:
> + case V4SI_FTYPE_V4SI_INT_V4SI_UQI_COUNT:
> + case V4SI_FTYPE_V4SI_V4SI_V4SI_UQI_COUNT:
> + case V8DI_FTYPE_V8DI_INT_V8DI_UQI_COUNT:
> + case V8DI_FTYPE_V8DI_V2DI_V8DI_UQI_COUNT:
> + case V8HI_FTYPE_V8HI_INT_V8HI_UQI_COUNT:
> + case V8HI_FTYPE_V8HI_V8HI_V8HI_UQI_COUNT:
> + case V8SI_FTYPE_V8SI_INT_V8SI_UQI_COUNT:
> + case V8SI_FTYPE_V8SI_V4SI_V8SI_UQI_COUNT:
> + nargs = 4;
> + second_arg_count = true;
> break;
> case UINT64_FTYPE_UINT64_UINT64:
> case UINT_FTYPE_UINT_UINT:
> @@ -35572,7 +35593,7 @@ ix86_expand_args_builtin (const struct b
> machine_mode mode = insn_p->operand[i + 1].mode;
> bool match = insn_p->operand[i + 1].predicate (op, mode);
>
> - if (last_arg_count && (i + 1) == nargs)
> + if (second_arg_count && i == 1)
> {
> /* SIMD shift insns take either an 8-bit immediate or
> register as count. But builtin functions take int as
> --- gcc/testsuite/gcc.target/i386/pr80381.c.jj 2017-04-10 17:46:02.660726774
> +0200
> +++ gcc/testsuite/gcc.target/i386/pr80381.c 2017-04-10 17:43:51.000000000
> +0200
> @@ -0,0 +1,29 @@
> +/* PR target/80381 */
> +/* { dg-do compile } */
> +/* { dg-options "-mavx512f -O2" } */
> +
> +#include <x86intrin.h>
> +
> +__m512i
> +f1 (__m512i x, int a)
> +{
> + return _mm512_srai_epi32 (x, a);
> +}
> +
> +__m512i
> +f2 (__m512i x, __m512i y, __mmask16 m, int a)
> +{
> + return _mm512_mask_srai_epi32 (y, m, x, a);
> +}
> +
> +__m512i
> +f3 (__m512i x)
> +{
> + return _mm512_srai_epi32 (x, 6);
> +}
> +
> +__m512i
> +f4 (__m512i x, __m512i y, __mmask16 m)
> +{
> + return _mm512_mask_srai_epi32 (y, m, x, 6);
> +}
>
> Jakub
