On Mon, Apr 10, 2017 at 10:13:01AM +0100, Dominik Vogt wrote: > On Fri, Apr 07, 2017 at 07:22:23PM +0200, Ulrich Weigand wrote: > > Dominik Vogt wrote: > > > On Fri, Apr 07, 2017 at 04:34:44PM +0200, Ulrich Weigand wrote: > > > > > +; Peephole to combine a load-and-test from volatile memory which > > > > > combine does > > > > > +; not do. > > > > > +(define_peephole2 > > > > > + [(set (match_operand:GPR 0 "register_operand") > > > > > + (match_operand:GPR 2 "memory_operand")) > > > > > + (set (reg CC_REGNUM) > > > > > + (compare (match_dup 0) (match_operand:GPR 1 "const0_operand")))] > > > > > + "s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM > > > > > + && GENERAL_REG_P (operands[0]) > > > > > + && satisfies_constraint_T (operands[2])" > > > > > + [(parallel > > > > > + [(set (reg:CCS CC_REGNUM) > > > > > + (compare:CCS (match_dup 2) (match_dup 1))) > > > > > + (set (match_dup 0) (match_dup 2))])]) > > > > > > > > Still wondering why this is necessary. > > > > > > It's necessary vecause Combine refuses to match anything that > > > contains a volatile memory reference, using a global flag for > > > Recog. > > > > So is this specifically to match the pre-test load emitted here? > > > > + emit_move_insn (output, mem); > > + emit_insn (gen_rtx_SET (cc, gen_rtx_COMPARE (CCZmode, output, cmp))); > > > > If so, since you already know that this should always map to a > > LOAD AND TEST, could simply just emit the LT pattern here, > > instead of relying on combine to do it ... > > Well, only if the value to compare to is constant zero (which is > what Glibc does). In all other cases this won't result in > load-and-test.
So, we could add a special case for const0_rtx that generates the LT pattern and does not rely on Combine, and get rid of the peephole. I'm not sure this is worthwhile thoug, because the peephole has other beneficial effects (as discussed), and until we've solved the problems preventing Combine from merging L+LTR in some cases, this is the best we have. What do you think? Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany
