> Eric, I'm sure you have noticed this, but the Sparc target test > "combined-1.c" fails for some time on 32-bit because of how float > arguments are passed in the 32-bit SPARC ABI. > > Since they are passed in integer registers, the vectorizer does > the initial logical operations using non-VIS instructions, > then pops them into the FPU regs to use the VIS vector addition > and subtraction.
Yes, I noticed it, but this is a regression and probably is unrelated to the vectorizer. IIRC the problem comes from the RA, which forces a bogus reload. That wouldn't be the first time some RA change breaks vector support on SPARC 32-bit and this usually means that the change is at least questionable. > Would you mind if I added a hack, like we use in the other test > cases and the one I added here, to force the VIS operations to > be used on 32-bit? We could either pass the vectors as pointer > args, or use the trick where we return the vector values from > extern functions. Let me first investigate a bit. -- Eric Botcazou
