On Tue, 7 Feb 2017, Jakub Jelinek wrote:
>> Hmm, this is not good since 319433-020.pdf and 319433-022.pdf redirect
>> to 319433-028 (which is the same as under the new URL I now used). And
>> the links to 319433-015.pdf and 319433-023.pdf both were broken.
>>
>> Do you have a recommendation?
> I think
> https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf
> The -028 manual only contains AVX512{VBMI,IFMA,4FMAPS,4VNNIW,VPOPCNT*}
> instructions
> plus for some very strange reason VPERMT2* instruction which is declared
> to be part of AVX512{F,VL,BW}.
Thanks, Jakub!
I went ahead with this recommendation and on the way also boiled
down the number of links from four to two (since it's pretty likely
we'll have to chase this again a year or two from now).
Applied.
Gerald
Index: svn.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/svn.html,v
retrieving revision 1.216
diff -u -r1.216 svn.html
--- svn.html 28 Feb 2017 02:47:07 -0000 1.216
+++ svn.html 12 Mar 2017 00:00:26 -0000
@@ -406,7 +406,7 @@
<dt>avx-512vlbwdq</dt>
<dd>The goal of this branch is to implement the Intel AVX-512{VL,BW,DQ}
Programming Reference
- (<a
href="https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf";>link</a>).
+ (<a
href="https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf";>link</a>).
The branch is maintained by Yukhin Kirill <<a
href="mailto:kirill.yuk...@intel.com";>kirill.yuk...@intel.com</a>>.
Patches should be marked with the tag <code>[AVX512]</code> in the subject
@@ -464,8 +464,7 @@
and H.J. Lu <<a
href="mailto:hjl.to...@gmail.com";>hjl.to...@gmail.com</a>>.</dd>
<dt>mpx</dt>
- <dd>The goal of this branch is to support Intel MPX technology
- (<a
href="https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf";>link</a>).
+ <dd>The goal of this branch is to support Intel MPX technology.
The branch is maintained by
Ilya Enkovich <<a
href="mailto:ilya.enkov...@intel.com";>ilya.enkov...@intel.com</a>>
Patches should be marked with the tag <code>[MPX]</code> in the subject
Index: gcc-5/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-5/changes.html,v
retrieving revision 1.146
diff -u -r1.146 changes.html
--- gcc-5/changes.html 11 Mar 2017 23:17:24 -0000 1.146
+++ gcc-5/changes.html 12 Mar 2017 00:00:26 -0000
@@ -776,9 +776,9 @@
<h3 id="x86">IA-32/x86-64</h3>
<ul>
- <li>New ISA extensions support
- <a
href="https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf";>
- AVX-512{BW,DQ,VL,IFMA,VBMI}</a> of Intel's CPU
+ <li>New <a
+
href="https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf";>ISA
extensions</a>
+ support AVX-512{BW,DQ,VL,IFMA,VBMI} of Intel's CPU
codenamed Skylake Server was added to GCC. That includes inline
assembly support, new intrinsics, and basic autovectorization. These
new AVX-512 extensions are available via
@@ -788,9 +788,8 @@
<code>-mavx512dq</code>, AVX-512 FMA-52 instructions:
<code>-mavx512ifma</code> and for AVX-512 Vector Bit Manipulation
Instructions: <code>-mavx512vbmi</code>.</li>
- <li>New ISA extensions support
- <a
href="https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf";>
- Intel MPX</a> was added to GCC. This new extension is available via the
+ <li>New ISA extensions support Intel MPX was added to GCC.
+ This new extension is available via the
<code>-mmpx</code> compiler switch. Intel MPX is a set of processor
features which,
with compiler, run-time library and OS support, brings increased
robustness to
software by run-time checking pointer references against their bounds.
