Hi,
A bug was discovered in MSA dotp_<su>_d, dpadd_<su>_d and dpsub_<su>_d RTL
patterns while CSE'ing the result:
Wrong MODE for vec_select in the second mult operand.
The patch below fixes the same.
OK for trunk?
Changelog:
2017-03-06 Prachi Godbole <prachi.godb...@imgtec.com>
gcc/
* config/mips/mips-msa.md (msa_dotp_<su>_d, msa_dpadd_<su>_d,
msa_dpsub_<su>_d): Fix MODE for vec_select.
gcc/testsuite/
* gcc.target/mips/msa-dotp.c: New tests.
Index: config/mips/mips-msa.md
===================================================================
--- config/mips/mips-msa.md (revision 245205)
+++ config/mips/mips-msa.md (working copy)
@@ -1230,10 +1230,10 @@
(parallel [(const_int 0) (const_int 2)]))))
(mult:V2DI
(any_extend:V2DI
- (vec_select:V4SI (match_dup 1)
+ (vec_select:V2SI (match_dup 1)
(parallel [(const_int 1) (const_int 3)])))
(any_extend:V2DI
- (vec_select:V4SI (match_dup 2)
+ (vec_select:V2SI (match_dup 2)
(parallel [(const_int 1) (const_int 3)]))))))]
"ISA_HAS_MSA"
"dotp_<su>.d\t%w0,%w1,%w2"
@@ -1319,10 +1319,10 @@
(parallel [(const_int 0) (const_int 2)]))))
(mult:V2DI
(any_extend:V2DI
- (vec_select:V4SI (match_dup 2)
+ (vec_select:V2SI (match_dup 2)
(parallel [(const_int 1) (const_int 3)])))
(any_extend:V2DI
- (vec_select:V4SI (match_dup 3)
+ (vec_select:V2SI (match_dup 3)
(parallel [(const_int 1) (const_int 3)])))))
(match_operand:V2DI 1 "register_operand" "0")))]
"ISA_HAS_MSA"
@@ -1414,10 +1414,10 @@
(parallel [(const_int 0) (const_int 2)]))))
(mult:V2DI
(any_extend:V2DI
- (vec_select:V4SI (match_dup 2)
+ (vec_select:V2SI (match_dup 2)
(parallel [(const_int 1) (const_int 3)])))
(any_extend:V2DI
- (vec_select:V4SI (match_dup 3)
+ (vec_select:V2SI (match_dup 3)
(parallel [(const_int 1) (const_int 3)])))))))]
"ISA_HAS_MSA"
"dpsub_<su>.d\t%w0,%w2,%w3"
Index: testsuite/gcc.target/mips/msa-dotp.c
===================================================================
--- testsuite/gcc.target/mips/msa-dotp.c (revision 0)
+++ testsuite/gcc.target/mips/msa-dotp.c (revision 0)
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-mips16 -mfp64 -mhard-float -mmsa" } */
+
+typedef int v4i32 __attribute__ ((vector_size(16)));
+typedef long long v2i64 __attribute__ ((vector_size(16)));
+
+/* Test MSA dot product family for CSE optimization. */
+
+static v4i32 g = {0, 92, 93, 94};
+static v4i32 h = {12, 24, 36, 48};
+static v2i64 l = {84, 98};
+
+void
+dotp_d_msa (v2i64 *c)
+{
+ *c = __builtin_msa_dotp_s_d (g, h);
+}
+/* { dg-final { scan-assembler "dotp_s.d" } } */
+
+void
+dpadd_d_msa (v2i64 *c)
+{
+ *c = __builtin_msa_dpadd_s_d (l, g, h);
+}
+/* { dg-final { scan-assembler "dpadd_s.d" } } */
+
+void
+dpsub_d_msa (v2i64 *c)
+{
+ *c = __builtin_msa_dpsub_s_d (l, g, h);
+}
+/* { dg-final { scan-assembler "dpsub_s.d" } } */
