The following patch fixes the problem of generating a logical shift for
vec_sra of an unsigned v2di vector.
Bootstrap/regtest on powerpc64le-unknown-linux-gnu with no new
regressions. Ok for trunk? Ok for backport to 5/6 branches after testing?
-Pat
2017-02-24 Pat Haugen <pthau...@us.ibm.com>
PR target/79544
* rs6000/rs6000-c.c (struct altivec_builtin_types): Use VSRAD for
arithmetic shift of unsigned V2DI.
testsuite/ChangeLog:
2017-02-24 Pat Haugen <pthau...@us.ibm.com>
* gcc.target/powerpc/pr79544.c: New.
Index: config/rs6000/rs6000-c.c
===================================================================
--- config/rs6000/rs6000-c.c (revision 245687)
+++ config/rs6000/rs6000-c.c (working copy)
@@ -2444,7 +2444,7 @@ const struct altivec_builtin_types altiv
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
{ ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD,
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
- { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRD,
+ { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD,
RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
{ ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
@@ -5012,7 +5012,7 @@ const struct altivec_builtin_types altiv
{ P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD,
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
- { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRD,
+ { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD,
RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
{ P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ,
Index: testsuite/gcc.target/powerpc/pr79544.c
===================================================================
--- testsuite/gcc.target/powerpc/pr79544.c (nonexistent)
+++ testsuite/gcc.target/powerpc/pr79544.c (working copy)
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O2" } */
+
+#include <altivec.h>
+
+vector unsigned long long
+test_sra (vector unsigned long long x, vector unsigned long long y)
+{
+ return vec_sra (x, y);
+}
+
+/* { dg-final { scan-assembler "vsrad" } } */
+
