On 24 January 2017 at 17:02, Kyrill Tkachov <kyrylo.tkac...@foss.arm.com> wrote: > > On 24/01/17 15:21, Segher Boessenkool wrote: >> >> On Tue, Jan 24, 2017 at 01:40:46PM +0100, Bernd Schmidt wrote: >>> >>> On 01/24/2017 09:38 AM, Christophe Lyon wrote: >>>> >>>> It seems that Bernd's patch causes regressions on arm-linux-gnueabihf >>>> --with-cpu=cortex-a5 --with-fpu=vfpv3-d16-fp16: >>>> >>>> gcc.target/arm/vselvcdf.c scan-assembler-times vselvs.f64\td[0-9]+ 1 >>>> gcc.target/arm/vselvcsf.c scan-assembler-times vselvs.f32\ts[0-9]+ 1 >>>> gcc.target/arm/vselvsdf.c scan-assembler-times vselvs.f64\td[0-9]+ 1 >>>> gcc.target/arm/vselvssf.c scan-assembler-times vselvs.f32\ts[0-9]+ 1 >>>> >>>> Maybe the upcoming patch from Segher intends to address this? >>> >>> Not really. >> >> Not at all, even, first I hear of this. Please open a PR. >> >>> How exactly do I reproduce this - can you give me a command >>> line and expected assembly output (I'm having some trouble figuring out >>> the right set of switches)? >> >> Same here. > > > I haven't looked at these in detail but these are the ARMv8 FP conditional > select tests > and they would be affected by if_then_else generation. > > So something like -mfpu=neon-fp-armv8 -mfloat-abi=hard -O2 -mcpu=cortex-a5 > would reproduce this. > Maybe the Cortex-A5 BRANCH_COST affects things... >
Thanks Kyrill, and sorry for not replying earlier. Yes something like that. The configuration in question is configured with: -target=arm-none-linux-gnueabihf --with-float=hard --enable-build-with-cxx --with-mode=arm --with-cpu=cortex-a5 --with-fpu=vfpv3-d16-fp16 If you can't easily rebuild the whole toolchain, you can use an arm-linux-gnueabihf toolchain and use -mcpu=cortex-a5 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard. It's not the first time that Cortex-A5's BRANCH_COST implies changes on a testcase. Christophe > Kyrill > > > >> >> Segher > >
