On Thu, Jan 19, 2017 at 11:00 AM, Jakub Jelinek <ja...@redhat.com> wrote: > On Thu, Jan 19, 2017 at 10:45:08AM +0100, Richard Biener wrote: >> > But in the escape analysis we could consider all the specially marked >> > "omp simt private" addressable vars to escape and thus confine them into >> > the >> > SIMT region that way, right? >> >> We could. But that doesn't prevent vars from outside of the region to >> bleed into >> it which was what Alex was asking about? For the OMP vars just placing >> clobbers before EXIT and after ENTER will confine them as well. > > Movement of read accesses to non-"omp simt private" variables into the SIMT > region across SIMT_ENTER is not a problem I think, those vars still would be > allocated on the per-warp granularity and all simt threads would just read > the same value. The problem would be only if writes to such variables > are moved later across SIMT_ENTER or earlier across SIMT_EXIT, that would > turn something initially non-racy into racy. > Would it help if we e.g. have an artificial (ABNORMAL) edge in between basic > block with > SIMT_ENTER and basic block with SIMT_EXIT to make it clearer that those > calls aren't just ordinary calls, but very special control flow altering > statements?
Yes, making them start/end BBs and having extra incoming/outgoing abnormal edges is the usual trick of adding data dependencies on "anything". But it's also somewhat awkward as you need to find a suitable source for the edges (each other? but then we have a loop with abnormals which might or might not confuse things -- eventually all BBs will appear to be in an irreducible region, the SIMT loop itself should be fine though). > > Jakub
