On Wed, Jan 11, 2017 at 04:39:19PM -0600, Segher Boessenkool wrote:
> On Mon, Jan 09, 2017 at 07:32:27PM -0500, Michael Meissner wrote:
> > This patch fixes PR target/79004 by eliminating the optimization of avoiding
> > direct move if we are converting an 8/16-bit integer value from memory to
> > IEEE
> > 128-bit floating point.
> >
> > I opened a new bug (PR target/79038) to address the underlying issue that
> > the
> > IEEE 128-bit floating point integer conversions were written before small
> > integers were allowed in the traditional Altivec registers. This meant
> > that we
> > had to use UNSPEC and explicit temporaries to get the integers into the
> > appropriate registers.
> >
> > I have tested this bug by doing a bootstrap build and make check on a little
> > endian power8 system and using an assembler that knows about ISA 3.0
> > instructions. I added a new test to verify the results. Can I check this
> > into
> > the trunk? This is not an issue on GCC 6.x.
>
> Okay, thanks! Two comments:
>
> > +/* { dg-final { scan-assembler-not " bl __" } } */
> > +/* { dg-final { scan-assembler "xscvdpqp" } } */
> > +/* { dg-final { scan-assembler "xscvqpdp" } } */
>
> This line always matches if ...
>
> > +/* { dg-final { scan-assembler "xscvqpdpo" } } */
>
> ... this one does. I recommend \m \M .
Ok, I rewrote the test to use \m and \M and checked it in. Thanks.
> > +/* { dg-final { scan-assembler "xscvqpsdz" } } */
> > +/* { dg-final { scan-assembler "xscvqpswz" } } */
> > +/* { dg-final { scan-assembler "xscvsdqp" } } */
> > +/* { dg-final { scan-assembler "xscvudqp" } } */
> > +/* { dg-final { scan-assembler "lxsd" } } */
> > +/* { dg-final { scan-assembler "lxsiwax" } } */
> > +/* { dg-final { scan-assembler "lxsiwzx" } } */
> > +/* { dg-final { scan-assembler "lxssp" } } */
> > +/* { dg-final { scan-assembler "stxsd" } } */
> > +/* { dg-final { scan-assembler "stxsiwx" } } */
> > +/* { dg-final { scan-assembler "stxssp" } } */
>
> There are many more than 14 instructions generated; maybe you want
> scan-assembler-times?
I had thought about it, but I thought it might impede future optimizations
(i.e. whether short/char are converted to 32-bit word or 64-bit word before
doing the stores).
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: [email protected], phone: +1 (978) 899-4797
