Hi, folks, any idea about this patch?

> 在 2016年12月24日,20:53,Yunqiang Su <yunqiang...@imgtec.com> 写道:
> 
> By this patch, I add 
>    build-time options:
>         —with-madd4=unfused/fused/no
>    runtime options:
>         -mmadd4=unfused/fused/no
> 
> to disable or set madd.fmt type.
> 
> For MIPS r6 (TARGET_MIPS8000) and Loongson (TARGET_LOONGSON_3A), 
> it always generate fused madd.fmt or maddf.fmt.
> 
> diff --git a/gcc/config.gcc b/gcc/config.gcc
> index 7afbc54bc78..7176d4484f7 100644
> --- a/gcc/config.gcc
> +++ b/gcc/config.gcc
> @@ -3940,7 +3940,7 @@ case "${target}" in
>               ;;
> 
>       mips*-*-*)
> -             supported_defaults="abi arch arch_32 arch_64 float fpu nan 
> fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci"
> +             supported_defaults="abi arch arch_32 arch_64 float fpu nan 
> fp_32 odd_spreg_32 madd4 tune tune_32 tune_64 divide llsc mips-plt synci"
> 
>               case ${with_float} in
>               "" | soft | hard)
> @@ -3997,6 +3997,16 @@ case "${target}" in
>                       exit 1
>                       ;;
>               esac
> +             
> +             case ${with_madd4} in
> +             "" | fused | unfused | no)
> +                     # OK
> +                     ;;
> +             *)
> +                     echo "Unknown madd4 type used in 
> --with-madd4=$with_madd4" 1>&2
> +                     exit 1
> +                     ;;
> +             esac
> 
>               case ${with_abi} in
>               "" | 32 | o64 | n32 | 64 | eabi)
> @@ -4496,7 +4506,7 @@ case ${target} in
> esac
> 
> t=
> -all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 
> tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt 
> synci tls"
> +all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 
> tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 madd4 divide llsc 
> mips-plt synci tls"
> for option in $all_defaults
> do
>       eval "val=\$with_"`echo $option | sed s/-/_/g`
> diff --git a/gcc/config/mips/mips-opts.h b/gcc/config/mips/mips-opts.h
> index 40aa006bc4e..ea1e0ea5310 100644
> --- a/gcc/config/mips/mips-opts.h
> +++ b/gcc/config/mips/mips-opts.h
> @@ -34,6 +34,13 @@ enum mips_ieee_754_setting {
>   MIPS_IEEE_754_2008
> };
> 
> +/* Enumerates the setting of the -mmadd4 option.  */
> +enum mips_madd4_setting {
> +  MIPS_MADD4_DEFAULT,
> +  MIPS_MADD4_UNFUSED,
> +  MIPS_MADD4_FUSED,
> +  MIPS_MADD4_NO
> +};
> /* Enumerates the setting of the -mr10k-cache-barrier option.  */
> enum mips_r10k_cache_barrier_setting {
>   R10K_CACHE_BARRIER_NONE,
> diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
> index bb66c428dd1..e8ca94ac709 100644
> --- a/gcc/config/mips/mips.h
> +++ b/gcc/config/mips/mips.h
> @@ -863,6 +863,7 @@ struct mips_cpu_info {
>           
> ":%{!msoft-float:%{!msingle-float:%{!mfp*:%{!mmsa:-mfp%(VALUE)}}}}}" }, \
>   {"odd_spreg_32", "%{" OPT_ARCH32 ":%{!msoft-float:%{!msingle-float:" \
>                  "%{!modd-spreg:%{!mno-odd-spreg:-m%(VALUE)}}}}}" }, \
> +  {"madd4", "%{!mmadd4=*:-mmadd4=%(VALUE)}" }, \
>   {"divide", "%{!mdivide-traps:%{!mdivide-breaks:-mdivide-%(VALUE)}}" }, \
>   {"llsc", "%{!mllsc:%{!mno-llsc:-m%(VALUE)}}" }, \
>   {"mips-plt", "%{!mplt:%{!mno-plt:-m%(VALUE)}}" }, \
> @@ -1056,11 +1057,12 @@ struct mips_cpu_info {
> 
> /* ISA has 4 operand fused madd instructions of the form
>    'd = [+-] (a * b [+-] c)'.  */
> -#define ISA_HAS_FUSED_MADD4  TARGET_MIPS8000
> +#define ISA_HAS_FUSED_MADD4  (TARGET_MIPS8000 || TARGET_LOONGSON_3A || 
> (mips_madd4==MIPS_MADD4_FUSED))
> 
> /* ISA has 4 operand unfused madd instructions of the form
>    'd = [+-] (a * b [+-] c)'.  */
> -#define ISA_HAS_UNFUSED_MADD4        (ISA_HAS_FP4 && !TARGET_MIPS8000)
> +#define ISA_HAS_UNFUSED_MADD4        (ISA_HAS_FP4 && !TARGET_MIPS8000 && 
> !TARGET_LOONGSON_3A && \
> +             (mips_madd4!=MIPS_MADD4_FUSED) && (mips_madd4!=MIPS_MADD4_NO))
> 
> /* ISA has 3 operand r6 fused madd instructions of the form
>    'c = c [+-] (a * b)'.  */
> diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt
> index 08dd83e14ce..0d9a6e4362e 100644
> --- a/gcc/config/mips/mips.opt
> +++ b/gcc/config/mips/mips.opt
> @@ -416,6 +416,23 @@ modd-spreg
> Target Report Mask(ODD_SPREG)
> Enable use of odd-numbered single-precision registers.
> 
> +mmadd4=
> +Target RejectNegative Joined Enum(mips_madd4_value) Var(mips_madd4) 
> Init(MIPS_MADD4_DEFAULT)
> +-mmadd4=TYPE Select madd.fmt/msub.fmt type.
> +
> +Enum
> +Name(mips_madd4_value) Type(int)
> +Known MIPS madd.fmt type settings (for use with the -mmadd4 options):
> +
> +EnumValue
> +Enum(mips_madd4_value) String(unfused) Value(MIPS_MADD4_UNFUSED)
> +
> +EnumValue
> +Enum(mips_madd4_value) String(fused) Value(MIPS_MADD4_FUSED)
> +
> +EnumValue
> +Enum(mips_madd4_value) String(no) Value(MIPS_MADD4_NO)
> +
> mframe-header-opt
> Target Report Var(flag_frame_header_optimization) Optimization
> Optimize frame header.
> diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
> index b911d76dd66..e548733537d 100644
> --- a/gcc/doc/install.texi
> +++ b/gcc/doc/install.texi
> @@ -1338,6 +1338,23 @@ In the absence of this configuration option the 
> default convention is
> the legacy encoding, as when neither of the @option{-mnan=2008} and
> @option{-mnan=legacy} command-line options has been used.
> 
> +@item --with-madd4=@var{type}
> +On MIPS targets, set the default behaivor of madd.fmt/msub.fmt. The
> +possibilities for @var{type} are:
> +@table @code
> +@item unfused
> +The madd.fmt/msub.fmt instructions are unfused, as with the 
> +@option{-mmadd4=unfused} command-line option.
> +@item fused
> +The madd.fmt/msub.fmt instructions are fused, as with the 
> +@option{-mmadd4=fused} command-line option.
> +@item no
> +The madd.fmt/msub.fmt are disabled, as with the @option{-mmadd4=no} 
> +command-line option.
> +@end table
> +In the absence of this configuration option the default convention is
> +the unfused, while for MIPS r6 and Loongson, the default is fused.
> +
> @item --with-divide=@var{type}
> Specify how the compiler should generate code for checking for
> division by zero.  This option is only supported on the MIPS target.
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index 1096254085f..e88040cdceb 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -19289,6 +19289,29 @@ their trailing significand field being 0.
> The default is @option{-mnan=legacy} unless GCC has been configured with
> @option{--with-nan=2008}.
> 
> +@item -mmadd4=unfused
> +@item -mmadd4=fused
> +@item -mmadd4=no
> +@opindex mmadd4=unfused
> +@opindex mmadd4=fused
> +@opindex mmadd4=no
> +These options control the type of madd.fmt/msub.fmt, unfused, fused 
> +or disabled at all.
> +
> +The @option{-mmadd4=unfused} option will set type of madd.fmt/msub.fmt
> +to be unfused if they are generated.
> +
> +The @option{-mmadd4=fused} option will set type of madd.fmt/msub.fmt
> +to be fused if they are generated.
> +
> +The @option{-mmadd4=no} option will disable madd.fmt/msub.fmt
> +to be generated at all.
> +
> +The default is @option{-mmadd4=unfused} unless GCC has been configured
> +for MIPS r6+ or Loongson. If runtime flags for MIPS r6 or Loongson is
> +given, the type will always be `fused', no matter what value 
> +@option{-mmadd4=} is.
> +
> @item -mllsc
> @itemx -mno-llsc
> @opindex mllsc
> 

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