Hello! Attached patch improves cost function for STV transform of shifts with constant count operand. The new cost function reduces the gain by COST_N_INSN(1) for shifts larger than or equal to 32.
2016-12-11 Uros Bizjak <ubiz...@gmail.com> PR target/70799 * config/i386/i386.c (dimode_scalar_to_vector_candidate_p) <case ASHIFT, case LSHIFTRT>: Consider all constant shifts. Add FIXME comment. (dimode_scalar_chain::compute_convert_gain): Reduce gain for constant shifts larger or equal than 32. testsuite/ChangeLog: 2016-12-11 Uros Bizjak <ubiz...@gmail.com> PR target/70799 * gcc.target/i386/pr70799-3.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu, committed to mainline SVN. Uros.
Index: config/i386/i386.c =================================================================== --- config/i386/i386.c (revision 243523) +++ config/i386/i386.c (working copy) @@ -2809,10 +2809,9 @@ dimode_scalar_to_vector_candidate_p (rtx_insn *ins { case ASHIFT: case LSHIFTRT: - /* Consider only non-variable shifts narrower - than general register width. */ - if (!(CONST_INT_P (XEXP (src, 1)) - && IN_RANGE (INTVAL (XEXP (src, 1)), 0, 31))) + /* FIXME: consider also variable shifts. */ + if (!CONST_INT_P (XEXP (src, 1)) + || !IN_RANGE (INTVAL (XEXP (src, 1)), 0, 63)) return false; break; @@ -3409,6 +3408,9 @@ dimode_scalar_chain::compute_convert_gain () gain += ix86_cost->add; if (CONST_INT_P (XEXP (src, 0))) gain -= vector_const_cost (XEXP (src, 0)); + if (CONST_INT_P (XEXP (src, 1)) + && INTVAL (XEXP (src, 1)) >= 32) + gain -= COSTS_N_INSNS (1); } else if (GET_CODE (src) == PLUS || GET_CODE (src) == MINUS Index: testsuite/gcc.target/i386/pr70799-3.c =================================================================== --- testsuite/gcc.target/i386/pr70799-3.c (nonexistent) +++ testsuite/gcc.target/i386/pr70799-3.c (working copy) @@ -0,0 +1,17 @@ +/* PR target/pr70799 */ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -march=slm -fno-split-wide-types -mno-stackrealign" } */ +/* { dg-final { scan-assembler "psllq" } } */ +/* { dg-final { scan-assembler "psrlq" } } */ + +unsigned long long a, b, c; + +void test1 (void) +{ + a = (b << 55) | c; +} + +void test2 (void) +{ + a = (b >> 55) | c; +}