Bernd wrote:

> Hmm, it probably doesn't hurt, but looking at the PR I think the originally 
> reported problem 
> suggests you need a different fix: a separate register class to be used for 
> indirect sibling calls. 
> I remember seeing similar issues on other targets. 

The only safe way to block any changes between direct and indirect calls is to 
split
them into separate instructions (rather than have 2 alternatives).  That's a 
good idea
to do anyway as calls already do this, so tailcalls should follow the same 
pattern.

However this patch fixes the postreload issue for all targets, similarly my 
leaf_function
patches fix any latent issues in prolog/epilog generation across all targets.

Wilco

Reply via email to