On Wed, Nov 16, 2016 at 4:57 PM, Kyrill Tkachov
<kyrylo.tkac...@foss.arm.com> wrote:
> Hi all,
>
> As the PR says we have an RTL checking failure that occurs when building
> libgcc for aarch64.
> The expander code for addsi3 takes the REGNO of a SUBREG in operands[1]. The
> three operands
> in the failing case are:
> {(reg:SI 78), (subreg:SI (reg:DI 77) 0), (subreg:SI (reg:DI 73 [ ivtmp.9 ])
> 0)}
>
> According to the documentation of register_operand (which is the predicate
> for operands[1]),
> operands[1] can be a REG or a SUBREG. If it's a subreg it may also contain a
> MEM before reload
> (because it is guaranteed to be reloaded into a register later). Anyway, the
> bottom line is that
> we have to be careful when taking REGNO of expressions during expand-time.
>
> This patch extracts the inner rtx in case we have a SUBREG and checks that
> it's a REG before
> checking its REGNO.
>
> Bootstrapped and tested on aarch64-none-linux-gnu. Tested aarch64-none-elf
> with RTL checking enabled
> (without this patch that doesn't build).
>
> Ok for trunk?LGTM but can't approve. Ramana > Thanks, > Kyrill > > 2016-11-16 Kyrylo Tkachov <kyrylo.tkac...@arm.com> > > PR target/78362 > * config/aarch64/aarch64.md (add<mode>3): Extract inner expression > from a subreg in operands[1] and don't call REGNO on a non-reg > expression > when deciding to force operands[2] into a reg. > > 2016-11-16 Kyrylo Tkachov <kyrylo.tkac...@arm.com> > > PR target/78362 > * gcc.c-torture/compile/pr78362.c: New test.
