Hi!
This patch fixes a breakage introduced by the AVX2 changes.
On the attached testcase even with -O3 -mavx -mno-avx2 we generate
code that uses AVX2 insns. The immediate problem has been
a thinko in what GET_MODE_SIZE returns - it is byte size instead of bit
size. But the following patch also makes sure that get_attr_mode
for those insns doesn't unconditionally return OImode even for 16-byte
vectors with -mavx2 (when it should return TImode - perhaps scheduling or
some other attributes do care if it is accurate) and removes redundant cases
in sseinsnmode mode_attr (the integer 32-byte vector modes are present
already at the beginning of define_mode_attr).
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2011-09-07 Jakub Jelinek <ja...@redhat.com>
* config/i386/sse.md (sseinsnmode): Remove 32-byte integer vector
duplicates.
PR target/50310
* config/i386/sse.md (*andnot<mode>3, *<code><mode>3): Fix up
"mode" attribute computation.
* gcc.dg/pr50310-1.c: New test.
--- gcc/config/i386/sse.md.jj 2011-09-02 16:29:38.000000000 +0200
+++ gcc/config/i386/sse.md 2011-09-07 09:40:52.000000000 +0200
@@ -229,7 +229,7 @@ (define_mode_attr sseinsnmode
(V16QI "TI") (V8HI "TI") (V4SI "TI") (V2DI "TI") (V1TI "TI")
(V8SF "V8SF") (V4DF "V4DF")
(V4SF "V4SF") (V2DF "V2DF")
- (TI "TI") (V32QI "OI") (V16HI "OI") (V8SI "OI") (V4DI "OI")])
+ (TI "TI")])
;; Mapping of vector float modes to an integer mode of the same size
(define_mode_attr sseintvecmode
@@ -6340,14 +6340,13 @@ (define_insn "*andnot<mode>3"
(const_string "*")))
(set_attr "prefix" "orig,vex")
(set (attr "mode")
- (cond [(match_test "TARGET_AVX2")
- (const_string "OI")
- (match_test "GET_MODE_SIZE (<MODE>mode) > 128")
+ (cond [(and (not (match_test "TARGET_AVX2"))
+ (match_test "GET_MODE_SIZE (<MODE>mode) > 16"))
(const_string "V8SF")
- (match_test "TARGET_SSE2")
- (const_string "TI")
+ (not (match_test "TARGET_SSE2"))
+ (const_string "V4SF")
]
- (const_string "V4SF")))])
+ (const_string "<sseinsnmode>")))])
(define_expand "<code><mode>3"
[(set (match_operand:VI 0 "register_operand" "")
@@ -6416,14 +6415,13 @@ (define_insn "*<code><mode>3"
(const_string "*")))
(set_attr "prefix" "orig,vex")
(set (attr "mode")
- (cond [(match_test "TARGET_AVX2")
- (const_string "OI")
- (match_test "GET_MODE_SIZE (<MODE>mode) > 128")
+ (cond [(and (not (match_test "TARGET_AVX2"))
+ (match_test "GET_MODE_SIZE (<MODE>mode) > 16"))
(const_string "V8SF")
- (match_test "TARGET_SSE2")
- (const_string "TI")
+ (not (match_test "TARGET_SSE2"))
+ (const_string "V4SF")
]
- (const_string "V4SF")))])
+ (const_string "<sseinsnmode>")))])
(define_insn "*andnottf3"
[(set (match_operand:TF 0 "register_operand" "=x,x")
--- gcc/testsuite/gcc.dg/pr50310-1.c.jj 2011-09-07 09:00:39.000000000 +0200
+++ gcc/testsuite/gcc.dg/pr50310-1.c 2011-09-07 08:59:58.000000000 +0200
@@ -0,0 +1,18 @@
+/* PR target/50310 */
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+/* { dg-options "-O3 -mavx -mno-avx2" { target avx_runtime } } */
+
+double s1[4], s2[4];
+long long e[4];
+
+int
+main ()
+{
+ int i;
+ asm volatile ("" : : : "memory");
+ for (i = 0; i < 4; i++)
+ e[i] = __builtin_isunordered (s1[i], s2[i]) && s1[i] != s2[i] ? -1 : 0;
+ asm volatile ("" : : : "memory");
+ return 0;
+}
Jakub
