PR77289 exposes a latent problem with LRA constraint matching. In the buggy test cases, LRA performs a speculative register elimination before checking operands for matching constraints. With the elimination, the operands appear to match. However, when we call check_rtl() which attempts to recognize the instruction, the reg above it not eliminated leading to a "insn does not satisfy its constraints" ICE.
This patch fixes the problem by not performing register elimination during constraint matching. operands_match_p() uses get_hard_reg() to grab a REG's hard reg number, so I have removed get_hard_reg()'s call to get_final_hard_regno() which performs the register elimination, which fixes the bug. uses_hard_regs_p() is the other caller of get_hard_regno() and it still needs register elimination to be called, so I have changed it to call get_final_hard_regno() instead. Since uses_hard_regs_p() may call get_final_hard_regno() with a pseudo, I have added support for mapping those to hard reg numbers before performing the register elimination. This has passed bootstrap and regtesting with no regressions. Ok for mainline? Peter gcc/ PR rtl-optimization/77289 * lra-constraints.c (get_final_hard_regno): Add support for non hard register numbers. Remove support for subregs. (get_hard_regno): Use SUBREG_P. Don't call get_final_hard_regno(). (get_reg_class): Delete removed get_final_hard_regno() argument. (uses_hard_regs_p): Call get_final_hard_regno(). gcc/testsuite/ PR rtl-optimization/77289 * gcc.target/powerpc/pr77289.c: New test. Index: gcc/lra-constraints.c =================================================================== --- gcc/lra-constraints.c (revision 239866) +++ gcc/lra-constraints.c (working copy) @@ -182,21 +182,22 @@ get_try_hard_regno (int regno) return ira_class_hard_regs[rclass][0]; } -/* Return final hard regno (plus offset) which will be after - elimination. We do this for matching constraints because the final - hard regno could have a different class. */ +/* Return the final hard regno which will be after elimination. + We do this because the final hard regno could have a different class. */ static int -get_final_hard_regno (int hard_regno, int offset) +get_final_hard_regno (int regno) { - if (hard_regno < 0) - return hard_regno; - hard_regno = lra_get_elimination_hard_regno (hard_regno); - return hard_regno + offset; + if (! HARD_REGISTER_NUM_P (regno)) + regno = lra_get_regno_hard_regno (regno); + if (regno < 0) + return regno; + return lra_get_elimination_hard_regno (regno); } -/* Return hard regno of X after removing subreg and making - elimination. If X is not a register or subreg of register, return - -1. For pseudo use its assignment. */ +/* Return the hard regno of X after removing its subreg. If X is not + a register or a subreg of a register, return -1. If X is a pseudo, + use its assignment. We do not process register eliminiations while + matching constraints. See PR77289. */ static int get_hard_regno (rtx x) { @@ -204,19 +205,19 @@ get_hard_regno (rtx x) int offset, hard_regno; reg = x; - if (GET_CODE (x) == SUBREG) + if (SUBREG_P (x)) reg = SUBREG_REG (x); if (! REG_P (reg)) return -1; - if ((hard_regno = REGNO (reg)) >= FIRST_PSEUDO_REGISTER) + if (! HARD_REGISTER_NUM_P (hard_regno = REGNO (reg))) hard_regno = lra_get_regno_hard_regno (hard_regno); if (hard_regno < 0) return -1; offset = 0; - if (GET_CODE (x) == SUBREG) + if (SUBREG_P (x)) offset += subreg_regno_offset (hard_regno, GET_MODE (reg), SUBREG_BYTE (x), GET_MODE (x)); - return get_final_hard_regno (hard_regno, offset); + return hard_regno + offset; } /* If REGNO is a hard register or has been allocated a hard register, @@ -232,7 +233,7 @@ get_reg_class (int regno) hard_regno = lra_get_regno_hard_regno (regno); if (hard_regno >= 0) { - hard_regno = get_final_hard_regno (hard_regno, 0); + hard_regno = get_final_hard_regno (hard_regno); return REGNO_REG_CLASS (hard_regno); } if (regno >= new_regno_start) @@ -1712,7 +1713,7 @@ uses_hard_regs_p (rtx x, HARD_REG_SET se if (REG_P (x)) { - x_hard_regno = get_hard_regno (x); + x_hard_regno = get_final_hard_regno (REGNO (x)); return (x_hard_regno >= 0 && overlaps_hard_reg_set_p (set, mode, x_hard_regno)); } Index: gcc/testsuite/gcc.target/powerpc/pr77289.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/pr77289.c (revision 0) +++ gcc/testsuite/gcc.target/powerpc/pr77289.c (working copy) @@ -0,0 +1,31 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ +/* { dg-options "-O3 -mcpu=power7 -funroll-loops -ffast-math -mlra -mupdate -fno-auto-inc-dec" } */ + +/* PR 77289: LRA ICEs due to invalid constraint checking. */ + +void dummy0 (float *); +float bar0 (float); +void +foo0 (long a, long b) +{ + float c[0]; + b = 0; + for (; b < a; b++) + c[b] = bar0 (c[b]); + dummy0 (c); +} + +void dummy1 (long *); +long bar1 (long); +void +foo1 (long a, long b) +{ + long array[128]; + long *c = array; + for (b=0; b < a; b++) + c[b] = bar1 (c[b]); + dummy1 (c); +}