Hello!
Attached patch improves and cleans up tree-ssa/prefetch-? testcases in
several ways:
a) Enables testcases on 64bit x86 targets by selecting amdfam10
architecture instead of 32bit-only athlon architecture
b) Removes unnecessary -msse2 -mfpmath=sse compile flags
c) Removes unnecessary SSE2 effective target requirement for compile tests (all)
d) Removes assembly scanning directives. The final prefetch asm insns
are heavily target dependent, we already scanned tree dumps for
correct codes, and we have tests for asm insns in gcc.misc-tests.
2016-08-24 Uros Bizjak <ubiz...@gmail.com>
PR target/77270
* gcc.dg/tree-ssa/loop-28.c: Also compile on 32bit x86 targets.
(dg-options): Use -march=amdfam10 instead of -march=athlon.
* gcc.dg/tree-ssa/update-unroll-1.c: Ditto.
* gcc.dg/tree-ssa/prefetch-3.c: Ditto.
* gcc.dg/tree-ssa/prefetch-4.c: Ditto.
* gcc.dg/tree-ssa/prefetch-5.c: Ditto.
* gcc.dg/tree-ssa/prefetch-6.c: Ditto. Do not require sse2
effective target. Remove scan-assembler-times directives.
* gcc.dg/tree-ssa/prefetch-7.c: Ditto.
* gcc.dg/tree-ssa/prefetch-8.c: Ditto.
* gcc.dg/tree-ssa/prefetch-9.c: Ditto.
Tested on x86_64-linux-gnu {,-m32}, where it "fixes" a couple of
scan-asm testsuite errors.
Committed to mainline SVN.
Uros.
Index: gcc.dg/tree-ssa/loop-28.c
===================================================================
--- gcc.dg/tree-ssa/loop-28.c (revision 239735)
+++ gcc.dg/tree-ssa/loop-28.c (working copy)
@@ -1,5 +1,5 @@
-/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
-/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon
-fdump-tree-optimized -fdump-tree-aprefetch --param max-unrolled-insns=1000" }
*/
+/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10
-fdump-tree-optimized -fdump-tree-aprefetch --param max-unrolled-insns=1000" }
*/
char x[100000];
Index: gcc.dg/tree-ssa/prefetch-3.c
===================================================================
--- gcc.dg/tree-ssa/prefetch-3.c (revision 239735)
+++ gcc.dg/tree-ssa/prefetch-3.c (working copy)
@@ -1,7 +1,7 @@
/* Prefetching used to prefer nonsensical unroll factor of 5 in this testcase.
*/
-/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
-/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse
-fdump-tree-aprefetch-details" } */
+/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10
-fdump-tree-aprefetch-details" } */
#define N 1000000
Index: gcc.dg/tree-ssa/prefetch-4.c
===================================================================
--- gcc.dg/tree-ssa/prefetch-4.c (revision 239735)
+++ gcc.dg/tree-ssa/prefetch-4.c (working copy)
@@ -1,7 +1,7 @@
/* The loop rolls too little, hence the prefetching would not be useful. */
-/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
-/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon
-fdump-tree-optimized" } */
+/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10
-fdump-tree-optimized" } */
int xxx[20];
Index: gcc.dg/tree-ssa/prefetch-5.c
===================================================================
--- gcc.dg/tree-ssa/prefetch-5.c (revision 239735)
+++ gcc.dg/tree-ssa/prefetch-5.c (working copy)
@@ -1,5 +1,5 @@
-/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
-/* { dg-options "-O2 --param min-insn-to-prefetch-ratio=5
-fprefetch-loop-arrays -march=athlon -fdump-tree-aprefetch-details" } */
+/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param
min-insn-to-prefetch-ratio=5 -fdump-tree-aprefetch-details" } */
/* These are common idioms for writing variable-length arrays at the end
of structures. We should not deduce anything about the number of iterations
Index: gcc.dg/tree-ssa/prefetch-6.c
===================================================================
--- gcc.dg/tree-ssa/prefetch-6.c (revision 239735)
+++ gcc.dg/tree-ssa/prefetch-6.c (working copy)
@@ -1,6 +1,5 @@
-/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
-/* { dg-require-effective-target sse2 } */
-/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse
--param simultaneous-prefetches=100 --param min-insn-to-prefetch-ratio=6
-fdump-tree-aprefetch-details" } */
+/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param
simultaneous-prefetches=100 --param min-insn-to-prefetch-ratio=6
-fdump-tree-aprefetch-details" } */
#define N 1000
#define K 900
@@ -47,7 +46,3 @@
/* { dg-final { scan-tree-dump-times "Issued prefetch" 5 "aprefetch" } } */
/* { dg-final { scan-tree-dump-times "Issued nontemporal prefetch" 3
"aprefetch" } } */
-
-/* { dg-final { scan-assembler-times "prefetcht" 5 } } */
-/* { dg-final { scan-assembler-times "prefetchnta" 3 } } */
-
Index: gcc.dg/tree-ssa/prefetch-7.c
===================================================================
--- gcc.dg/tree-ssa/prefetch-7.c (revision 239735)
+++ gcc.dg/tree-ssa/prefetch-7.c (working copy)
@@ -1,7 +1,5 @@
-/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
-/* { dg-require-effective-target sse2 } */
-/* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" }
} */
-/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse
--param simultaneous-prefetches=100 -fdump-tree-aprefetch-details
-fdump-tree-optimized" } */
+/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param
simultaneous-prefetches=100 -fdump-tree-aprefetch-details
-fdump-tree-optimized" } */
#define K 1000000
int a[K];
@@ -39,8 +37,3 @@
/* { dg-final { scan-tree-dump-times "a nontemporal store" 0 "aprefetch" } } */
/* { dg-final { scan-tree-dump-times "builtin_prefetch" 7 "optimized" } } */
-
-/* { dg-final { scan-assembler-times "prefetchw" 5 } } */
-/* { dg-final { scan-assembler-times "prefetcht" 1 } } */
-/* { dg-final { scan-assembler-times "prefetchnta" 1 } } */
-
Index: gcc.dg/tree-ssa/prefetch-8.c
===================================================================
--- gcc.dg/tree-ssa/prefetch-8.c (revision 239735)
+++ gcc.dg/tree-ssa/prefetch-8.c (working copy)
@@ -1,7 +1,5 @@
-/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
-/* { dg-require-effective-target sse2 } */
-/* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" }
} */
-/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse
--param simultaneous-prefetches=100 -fdump-tree-aprefetch-details
-fdump-tree-optimized" } */
+/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param
simultaneous-prefetches=100 -fdump-tree-aprefetch-details
-fdump-tree-optimized" } */
#define K 1000000
int a[K];
@@ -19,7 +17,3 @@
/* { dg-final { scan-tree-dump "=\\{nt\\}" "optimized" } } */
/* { dg-final { scan-tree-dump-times "__builtin_ia32_mfence" 1 "optimized" } }
*/
-
-/* { dg-final { scan-assembler "movnti" } } */
-/* { dg-final { scan-assembler-times "mfence" 1 } } */
-
Index: gcc.dg/tree-ssa/prefetch-9.c
===================================================================
--- gcc.dg/tree-ssa/prefetch-9.c (revision 239735)
+++ gcc.dg/tree-ssa/prefetch-9.c (working copy)
@@ -1,7 +1,5 @@
-/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
-/* { dg-require-effective-target sse2 } */
-/* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" }
} */
-/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse
--param simultaneous-prefetches=100 -fdump-tree-aprefetch-details
-fdump-tree-optimized" } */
+/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param
simultaneous-prefetches=100 -fdump-tree-aprefetch-details
-fdump-tree-optimized" } */
#define K 1000000
int a[K], b[K];
@@ -22,8 +20,3 @@
/* { dg-final { scan-tree-dump-times "builtin_prefetch" 1 "optimized" } } */
/* { dg-final { scan-tree-dump "=\\{nt\\}" "optimized" } } */
/* { dg-final { scan-tree-dump-times "__builtin_ia32_mfence" 1 "optimized" } }
*/
-
-/* { dg-final { scan-assembler-times "prefetchnta" 1 } } */
-/* { dg-final { scan-assembler "movnti" } } */
-/* { dg-final { scan-assembler-times "mfence" 1 } } */
-
Index: gcc.dg/tree-ssa/update-unroll-1.c
===================================================================
--- gcc.dg/tree-ssa/update-unroll-1.c (revision 239735)
+++ gcc.dg/tree-ssa/update-unroll-1.c (working copy)
@@ -1,5 +1,5 @@
-/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
-/* { dg-options "-O1 -fprefetch-loop-arrays -march=athlon
-fdump-tree-aprefetch-blocks" } */
+/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-O1 -fprefetch-loop-arrays -march=amdfam10
-fdump-tree-aprefetch-blocks" } */
int a[10000];
