Hello,
Tests added for FP16 argument and return values being passed in
registers only check the case when the FP16 IEEE format is used. This
patch adds equivalent tests that also check the behaviour when the
ARM Alternative format is used.
This patch depends on the testsuite directives added for the FP16 aapcs
tests at https://gcc.gnu.org/ml/gcc-patches/2016-06/msg01794.html.
Tested arm-none-eabi with cross-compiled make check-gcc and
arm-none-linux-gnueabihf with native make check.
Ok for trunk?
Matthew
testsuite/
2016-06-27 Matthew Wahab <matthew.wa...@arm.com>
* gcc.target/arm/fp16-aapcs-3.c: New.
* gcc.target/arm/fp16-aapcs-4.c: New.
* gcc.target/arm/aapcs/aapcs/vfp22.c: New.
* gcc.target/arm/aapcs/aapcs/vfp23.c: New.
* gcc.target/arm/aapcs/aapcs/vfp24.c: New.
* gcc.target/arm/aapcs/aapcs/vfp25.c: New.
>From 13b0cbec24a3fdeaaf6318acb42c79bf76e3414e Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wa...@arm.com>
Date: Wed, 15 Jun 2016 09:22:59 +0100
Subject: [PATCH] [ARM] FP16 ARM Alternative format variants of AAPCS tests.
Tests added for FP16 argument and return values being passed in
registers only check the case when the FP16 IEEE format is used. This
patch adds equivalent tests that to also check the behaviour when the
ARM Alternative format is used.
Tested arm-none-eabi with cross-compiled make check and
arm-none-linux-gnueabihf with native make check.
testsuite/
2016-06-27 Matthew Wahab <matthew.wa...@arm.com>
* gcc.target/arm/fp16-aapcs-3.c: New.
* gcc.target/arm/fp16-aapcs-4.c: New.
* gcc.target/arm/aapcs/aapcs/vfp22.c: New.
* gcc.target/arm/aapcs/aapcs/vfp23.c: New.
* gcc.target/arm/aapcs/aapcs/vfp24.c: New.
* gcc.target/arm/aapcs/aapcs/vfp25.c: New.
---
gcc/testsuite/gcc.target/arm/aapcs/vfp22.c | 28 +++++++++++++++++++++++++++
gcc/testsuite/gcc.target/arm/aapcs/vfp23.c | 30 +++++++++++++++++++++++++++++
gcc/testsuite/gcc.target/arm/aapcs/vfp24.c | 22 +++++++++++++++++++++
gcc/testsuite/gcc.target/arm/aapcs/vfp25.c | 26 +++++++++++++++++++++++++
gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c | 21 ++++++++++++++++++++
gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c | 21 ++++++++++++++++++++
6 files changed, 148 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/vfp22.c
create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/vfp23.c
create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/vfp24.c
create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/vfp25.c
create mode 100644 gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c
create mode 100644 gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp22.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp22.c
new file mode 100644
index 0000000..1944bb5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp22.c
@@ -0,0 +1,28 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_fp16_hw } */
+/* { dg-add-options arm_fp16_alternative } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "vfp22.c"
+#include "abitest.h"
+
+#else
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 1.0f, S0 + 2)
+#else
+ARG (__fp16, 1.0f, S0)
+#endif
+ARG (float, 2.0f, S1)
+ARG (double, 4.0, D1)
+ARG (float, 2.0f, S4)
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 1.0f, S5 + 2)
+#else
+ARG (__fp16, 1.0f, S5)
+#endif
+LAST_ARG (int, 3, R0)
+#endif
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp23.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp23.c
new file mode 100644
index 0000000..bcacf9f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp23.c
@@ -0,0 +1,30 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_fp16_hw } */
+/* { dg-add-options arm_fp16_alternative } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "vfp23.c"
+
+__complex__ x = 1.0+2.0i;
+
+#include "abitest.h"
+#else
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 1.0f, S0 + 2)
+#else
+ARG (__fp16, 1.0f, S0)
+#endif
+ARG (float, 2.0f, S1)
+ARG (__complex__ double, x, D1)
+ARG (float, 3.0f, S6)
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 2.0f, S7 + 2)
+#else
+ARG (__fp16, 2.0f, S7)
+#endif
+LAST_ARG (int, 3, R0)
+#endif
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp24.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp24.c
new file mode 100644
index 0000000..eac640e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp24.c
@@ -0,0 +1,22 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_fp16_hw } */
+/* { dg-add-options arm_fp16_alternative } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "vfp24.c"
+
+#define PCSATTR __attribute__((pcs("aapcs")))
+
+#include "abitest.h"
+#else
+ARG (float, 1.0f, R0)
+ARG (double, 2.0, R2)
+ARG (float, 3.0f, STACK)
+ARG (__fp16, 2.0f, STACK+4)
+LAST_ARG (double, 4.0, STACK+8)
+#endif
+
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp25.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp25.c
new file mode 100644
index 0000000..738681f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp25.c
@@ -0,0 +1,26 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_fp16_hw } */
+/* { dg-add-options arm_fp16_alternative } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "vfp25.c"
+
+#define PCSATTR __attribute__((pcs("aapcs")))
+
+#include "abitest.h"
+#else
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 1.0f, R0 + 2)
+#else
+ARG (__fp16, 1.0f, R0)
+#endif
+ARG (double, 2.0, R2)
+ARG (__fp16, 3.0f, STACK)
+ARG (float, 2.0f, STACK+4)
+LAST_ARG (double, 4.0, STACK+8)
+#endif
+
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c
new file mode 100644
index 0000000..b7d7e58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm_fp16_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_fp16_alternative } */
+
+/* Test __fp16 arguments and return value in registers (hard-float). */
+
+void
+swap (__fp16, __fp16);
+
+__fp16
+F (__fp16 a, __fp16 b, __fp16 c)
+{
+ swap (b, a);
+ return c;
+}
+
+/* { dg-final { scan-assembler-times {vmov\tr[0-9]+, s[0-2]} 2 } } */
+/* { dg-final { scan-assembler-times {vmov.f32\ts1, s0} 1 } } */
+/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 2 } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
new file mode 100644
index 0000000..4c90a56
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_ok } */
+/* { dg-options "-mfloat-abi=softfp -O2" } */
+/* { dg-add-options arm_fp16_alternative } */
+/* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */
+
+/* Test __fp16 arguments and return value in registers (softfp). */
+
+void
+swap (__fp16, __fp16);
+
+__fp16
+F (__fp16 a, __fp16 b, __fp16 c)
+{
+ swap (b, a);
+ return c;
+}
+
+/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */
+/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */
+/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */
--
2.1.4
