On Tue, Jun 21, 2016 at 06:46:57PM -0500, Bill Schmidt wrote:
> >> When I did this, I ran into a problem with an existing test case.  We end 
> >> up matching the *vsx_splat_v4si_internal pattern instead of falling back 
> >> to the altivec_vspltisw pattern.  The constraints don't match for constant 
> >> input.  To avoid this, I added a pattern ahead of this one that will match 
> >> for VMX output registers and produce the vspltisw as desired.  This 
> >> corrected the failing test and produces the expected code.
> > 
> > Why does the predicate allow constant input, while the constraints do not?
> 
> I have no idea why it was built that way.  The predicate seems to provide for 
> all sorts of things, but this and the subsequent pattern both handle only a 
> subset of the constraints implied by it.  To be honest, I didn't feel 
> competent to try to fix the existing patterns.  Do you have any suggestions 
> for what to do instead?

Don't give up so easily?  ;-)

The predicate should be tightened, the expander should use a new predicate
that allows all those other things.  The hardest part is figuring a good
name for it ;-)


Segher

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