On Thu, Jun 09, 2016 at 10:36:36AM +0100, Kyrill Tkachov wrote: > Hi all, > > We currently don't handle in the aarch64 rtx costs the pattern > *andim_ashift<mode>_bfiz that performs an ASHIFT followed by an AND. So we > end up recursing inside the AND and assigning a high cost to the pattern. Not > high enough to reject it during combine, but still wrong. > > This patch fixes that. It refactors the non-trivial matching condition from > the pattern to a new function in aarch64.c that is also re-used in the costs > calculation to properly handle this pattern. > > With this patch I see the pattern being assigned a cost of COSTS_N_INSNS (2) > for cortex-a53 rather than COSTS_N_INSN (3) which we got due to the recursion > into the operands of the AND. > > Bootstrapped and tested on aarch64. > > Ok for trunk?
OK. Thanks for the patch! James > 2015-06-09 Kyrylo Tkachov <kyrylo.tkac...@arm.com> > > * config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p): > New function. > (aarch64_rtx_costs): Use it. Rewrite CONST_INT_P (op1) case to handle > mask+shift version. > * config/aarch64/aarch64-protos.h (aarch64_mask_and_shift_for_ubfiz_p): > New prototype. > * config/aarch64/aarch64.md (*andim_ashift<mode>_bfiz): Replace > matching condition with aarch64_mask_and_shift_for_ubfiz_p.
