Please find gcc ChangeLog in the correct format.
ChangeLog:
Virendra Pathak <virendra.pat...@broadcom.com>
* config/aarch64/aarch64-cores.def (vulcan): New core
* config/aarch64/aarch64-tune.md: Regenerate
* doc/invoke.texi (AARCH64/mtune): Document vulcan as an
available option.
Thanks.
with regards,
Virendra Pathak
On Wed, Jun 8, 2016 at 10:52 AM, Virendra Pathak
<virendra.pat...@broadcom.com> wrote:
> Hi gcc-patches group,
>
> ping,
>
> updated the ChangeLog with author's entry.
>
> ChangeLog:
> Virendra Pathak (virendra.pat...@broadcom.com)
> * config/aarch64/aarch64-cores.def (vulcan): New core
> * config/aarch64/aarch64-tune.md: Regenerate
> * doc/invoke.texi (AARCH64/mtune): Document vulcan as an available option.
>
> Thanks.
>
> with regards,
> Virendra Pathak
>
>
> On Sat, Jun 4, 2016 at 12:05 PM, Virendra Pathak
> <virendra.pat...@broadcom.com> wrote:
>> Hi gcc-patches group,
>>
>> Please find the basic patch for adding -mcpu=vulcan support in the gcc.
>> Broadcom's vulcan is an armv8-a aarch64 based server processor.
>>
>> At present we are using schedule model of cortex-a57 but soon we will
>> be submitting a schedule model for vulcan.
>>
>> Please review the patch (attached with this mail) and kindly merge it
>> in the gcc-6-branch.
>>
>> Tested the patch with aarch64-linux-gnu cross build,
>> aarch64-unknown-linux-gnu native build and make check.
>> We have also obtained company wide agreement with FSF for contributing
>> to gcc project.
>>
>> Thanks.
>>
>>
>> ChangeLog:
>> * config/aarch64/aarch64-cores.def (vulcan): New core
>> * config/aarch64/aarch64-tune.md: Regenerate
>> * doc/invoke.texi (AARCH64/mtune): Document vulcan as an available option.
>>
>>
>>
>> with regards,
>> Virendra Pathak
From 8d065016856606740a3928518ed6a3f9933fb130 Mon Sep 17 00:00:00 2001
From: Virendra Pathak <virendra.pat...@broadcom.com>
Date: Wed, 1 Jun 2016 03:15:33 -0700
Subject: [PATCH] [AArch64] Add -mcpu vulcan support
---
gcc/config/aarch64/aarch64-cores.def | 1 +
gcc/config/aarch64/aarch64-tune.md | 2 +-
gcc/doc/invoke.texi | 4 ++--
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-cores.def
b/gcc/config/aarch64/aarch64-cores.def
index 251a3eb..b0acad9 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -46,6 +46,7 @@ AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8A,
AARCH64_FL_FOR_ARCH8 | AA
AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 |
AARCH64_FL_CRC, cortexa72, "0x41", "0xd08")
AARCH64_CORE("exynos-m1", exynosm1, exynosm1, 8A, AARCH64_FL_FOR_ARCH8 |
AARCH64_FL_CRC | AARCH64_FL_CRYPTO, exynosm1, "0x53", "0x001")
AARCH64_CORE("qdf24xx", qdf24xx, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 |
AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57, "0x51", "0x800")
+AARCH64_CORE("vulcan", vulcan, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 |
AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57, "0x42", "0x516")
AARCH64_CORE("thunderx", thunderx, thunderx, 8A, AARCH64_FL_FOR_ARCH8 |
AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, "0x43", "0x0a1")
AARCH64_CORE("xgene1", xgene1, xgene1, 8A, AARCH64_FL_FOR_ARCH8,
xgene1, "0x50", "0x000")
diff --git a/gcc/config/aarch64/aarch64-tune.md
b/gcc/config/aarch64/aarch64-tune.md
index cbc6f48..c758a5f 100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
;; -*- buffer-read-only: t -*-
;; Generated automatically by gentune.sh from aarch64-cores.def
(define_attr "tune"
-
"cortexa35,cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
+
"cortexa35,cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,vulcan,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 821f8fd..146042d 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12955,8 +12955,8 @@ processors implementing the target architecture.
Specify the name of the target processor for which GCC should tune the
performance of the code. Permissible values for this option are:
@samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57},
-@samp{cortex-a72}, @samp{exynos-m1}, @samp{qdf24xx}, @samp{thunderx},
-@samp{xgene1}.
+@samp{cortex-a72}, @samp{exynos-m1}, @samp{qdf24xx}, @samp{vulcan},
+@samp{thunderx}, @samp{xgene1}.
Additionally, this option can specify that GCC should tune the performance
of the code for a big.LITTLE system. Permissible values for this
--
2.1.4
