On 27/05/16 14:46, Kyrill Tkachov wrote: > > On 20/05/16 11:04, Kyrill Tkachov wrote: >> Hi all, >> >> The recent -frename-registers change exposed a deficiency in the way we fuse >> AESE/AESMC instruction >> pairs in arm. >> >> Basically we want to enforce: >> AESE Vn, _ >> AESMC Vn, Vn >> >> to enable the fusion, but regrename comes along and renames the output Vn >> register in AESMC to something >> else, killing the fusion in the hardware. >> >> The solution in this patch is to add an alternative that ties the input and >> output registers in the AESMC pattern >> and enable that alternative when the fusion is enabled. >> >> With this patch I've confirmed that the above preferred register sequence is >> kept even with -frename-registers >> when tuning for a cpu that enables the fusion and that the chain is broken >> by regrename otherwise and have >> seen the appropriate improvement in a proprietary benchmark (that I cannot >> name) that exercises this sequence. >> >> Bootstrapped and tested on arm-none-linux-gnueabihf. >> >> Ok for trunk? >> > > Following James's feedback on the AArch64 version, this slightly modified > version uses the enum type for the argument of the new function. > Is this ok instead? > > Thanks, > Kyrill > > 2016-05-27 Kyrylo Tkachov <kyrylo.tkac...@arm.com> > > * config/arm/arm.c (arm_fusion_enabled_p): New function. > * config/arm/arm-protos.h (arm_fusion_enabled_p): Declare prototype. > * config/arm/crypto.md (crypto_<crypto_pattern>, CRYPTO_UNARY): > Add "=w,0" alternative. Enable it when AES/AESMC fusion is enabled. >
Ok. ramana
