On Tue, May 24, 2016 at 09:23:36AM +0100, Jiong Wang wrote: > This patch reimplement scalar intrinsics for conversion between floating- > point and fixed-point. > > Previously, all such intrinsics are implemented through inline assembly. > This patch added RTL pattern for these operations that those intrinsics > can be implemented through builtins. > > gcc/ > 2016-05-23 Jiong Wang<jiong.w...@arm.com> > > * config/aarch64/aarch64-builtins.c (TYPES_BINOP_USS): New > (TYPES_BINOP_SUS): Likewise. > (aarch64_simd_builtin_data): Update include file name. > (aarch64_builtins): Likewise. > * config/aarch64/aarch64-simd-builtins.def: Rename to > aarch64-builtins.def.
Why? We already have some number of intrinsics in here that are not strictly SIMD, but I don't see the value in the rename? > diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md > index 223a4cc..d463808 100644 > --- a/gcc/config/aarch64/aarch64.md > +++ b/gcc/config/aarch64/aarch64.md > @@ -75,6 +75,8 @@ > UNSPEC_CRC32H > UNSPEC_CRC32W > UNSPEC_CRC32X > + UNSPEC_FCVTZS_SCALAR > + UNSPEC_FCVTZU_SCALAR Why do we need special "scalar" versions of the unspec? The operation is semantically the same between the scalar and vector versions. > UNSPEC_URECPE > UNSPEC_FRECPE > UNSPEC_FRECPS > @@ -105,6 +107,7 @@ > UNSPEC_NOP > UNSPEC_PRLG_STK > UNSPEC_RBIT > + UNSPEC_SCVTF_SCALAR > UNSPEC_SISD_NEG > UNSPEC_SISD_SSHL > UNSPEC_SISD_USHL > @@ -122,6 +125,7 @@ > UNSPEC_TLSLE24 > UNSPEC_TLSLE32 > UNSPEC_TLSLE48 > + UNSPEC_UCVTF_SCALAR > +(define_int_iterator FCVT_F2FIXED [UNSPEC_FCVTZS UNSPEC_FCVTZU]) > +(define_int_iterator FCVT_FIXED2F [UNSPEC_SCVTF UNSPEC_UCVTF]) > +(define_int_iterator FCVT_F2FIXED_SCALAR [UNSPEC_FCVTZS_SCALAR > UNSPEC_FCVTZU_SCALAR]) > +(define_int_iterator FCVT_FIXED2F_SCALAR [UNSPEC_SCVTF_SCALAR > UNSPEC_UCVTF_SCALAR]) Again, do we need the "SCALAR" versions at all? Thanks, James
