Hi all,
hwint.h defines a number of useful macros to access the constants -1,0,1 cast to
HOST_WIDE_INT or unsigned HOST_WIDE_INT. We can use these to save some
horizontal
space and parentheses when we need such constants.
This patch replaces such uses with these macros to slightly improve the
readability
of some of the expressions in the arm backend.
Bootstrapped and tested on arm-none-linux-gnueabihf.
Will commit as obvious.
Thanks,
Kyrill
P.S. One such usage remains in thumb1_rtx_costs since Thomas will be removing
it as part
of his ARMv8-M patches, so I didn't want to introduce a dependency.
2016-05-24 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* config/arm/arm.md (andsi3): Replace cast of 1 to HOST_WIDE_INT
with HOST_WIDE_INT_1.
(insv): Likewise.
* config/arm/arm.c (optimal_immediate_sequence): Replace cast of
1 to unsigned HOST_WIDE_INT with HOST_WIDE_INT_1U.
(arm_canonicalize_comparison): Likewise.
(thumb1_rtx_costs): Replace cast of 1 to HOST_WIDE_INT with
HOST_WIDE_INT_1.
(thumb1_size_rtx_costs): Likewise.
(vfp_const_double_index): Replace cast of 1 to unsigned
HOST_WIDE_INT with HOST_WIDE_INT_1U.
(get_jump_table_size): Replace cast of 1 to HOST_WIDE_INT with
HOST_WIDE_INT_1.
(arm_asan_shadow_offset): Replace cast of 1 to unsigned
HOST_WIDE_INT with HOST_WIDE_INT_1U.
* config/arm/neon.md (vec_set<mode>): Replace cast of 1 to
HOST_WIDE_INT with HOST_WIDE_INT_1.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 3fe6eab46f3c18ace6899b5be45ad646992f43e4..78478303593522d186734c452c970fb013bf846e 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -4053,7 +4053,7 @@ optimal_immediate_sequence (enum rtx_code code, unsigned HOST_WIDE_INT val,
yield a shorter sequence, we may as well use zero. */
insns1 = optimal_immediate_sequence_1 (code, val, return_sequence, best_start);
if (best_start != 0
- && ((((unsigned HOST_WIDE_INT) 1) << best_start) < val))
+ && ((HOST_WIDE_INT_1U << best_start) < val))
{
insns2 = optimal_immediate_sequence_1 (code, val, &tmp_sequence, 0);
if (insns2 <= insns1)
@@ -4884,7 +4884,7 @@ arm_canonicalize_comparison (int *code, rtx *op0, rtx *op1,
if (mode == VOIDmode)
mode = GET_MODE (*op1);
- maxval = (((unsigned HOST_WIDE_INT) 1) << (GET_MODE_BITSIZE(mode) - 1)) - 1;
+ maxval = (HOST_WIDE_INT_1U << (GET_MODE_BITSIZE (mode) - 1)) - 1;
/* For DImode, we have GE/LT/GEU/LTU comparisons. In ARM mode
we can also use cmp/cmpeq for GTU/LEU. GT/LE must be either
@@ -8254,8 +8254,8 @@ thumb1_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
int i;
/* This duplicates the tests in the andsi3 expander. */
for (i = 9; i <= 31; i++)
- if ((((HOST_WIDE_INT) 1) << i) - 1 == INTVAL (x)
- || (((HOST_WIDE_INT) 1) << i) - 1 == ~INTVAL (x))
+ if ((HOST_WIDE_INT_1 << i) - 1 == INTVAL (x)
+ || (HOST_WIDE_INT_1 << i) - 1 == ~INTVAL (x))
return COSTS_N_INSNS (2);
}
else if (outer == ASHIFT || outer == ASHIFTRT
@@ -9007,8 +9007,8 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
int i;
/* This duplicates the tests in the andsi3 expander. */
for (i = 9; i <= 31; i++)
- if ((((HOST_WIDE_INT) 1) << i) - 1 == INTVAL (x)
- || (((HOST_WIDE_INT) 1) << i) - 1 == ~INTVAL (x))
+ if ((HOST_WIDE_INT_1 << i) - 1 == INTVAL (x)
+ || (HOST_WIDE_INT_1 << i) - 1 == ~INTVAL (x))
return COSTS_N_INSNS (2);
}
else if (outer == ASHIFT || outer == ASHIFTRT
@@ -12122,7 +12122,7 @@ vfp3_const_double_index (rtx x)
/* We can permit four significant bits of mantissa only, plus a high bit
which is always 1. */
- mask = ((unsigned HOST_WIDE_INT)1 << (point_pos - 5)) - 1;
+ mask = (HOST_WIDE_INT_1U << (point_pos - 5)) - 1;
if ((mantissa & mask) != 0)
return -1;
@@ -16216,7 +16216,7 @@ get_jump_table_size (rtx_jump_table_data *insn)
{
case 1:
/* Round up size of TBB table to a halfword boundary. */
- size = (size + 1) & ~(HOST_WIDE_INT)1;
+ size = (size + 1) & ~HOST_WIDE_INT_1;
break;
case 2:
/* No padding necessary for TBH. */
@@ -29694,7 +29694,7 @@ arm_fusion_enabled_p (unsigned int op)
static unsigned HOST_WIDE_INT
arm_asan_shadow_offset (void)
{
- return (unsigned HOST_WIDE_INT) 1 << 29;
+ return HOST_WIDE_INT_1U << 29;
}
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 2b190e23a11f23f6e076a84bd309260c8bc4b9da..8c63bf7b75c4e84283ffee471375389f5a5b1a34 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -2154,13 +2154,13 @@ (define_expand "andsi3"
for (i = 9; i <= 31; i++)
{
- if ((((HOST_WIDE_INT) 1) << i) - 1 == INTVAL (operands[2]))
+ if ((HOST_WIDE_INT_1 << i) - 1 == INTVAL (operands[2]))
{
emit_insn (gen_extzv (operands[0], operands[1], GEN_INT (i),
const0_rtx));
DONE;
}
- else if ((((HOST_WIDE_INT) 1) << i) - 1
+ else if ((HOST_WIDE_INT_1 << i) - 1
== ~INTVAL (operands[2]))
{
rtx shift = GEN_INT (i);
@@ -2459,7 +2459,7 @@ (define_expand "insv"
{
int start_bit = INTVAL (operands[2]);
int width = INTVAL (operands[1]);
- HOST_WIDE_INT mask = (((HOST_WIDE_INT)1) << width) - 1;
+ HOST_WIDE_INT mask = (HOST_WIDE_INT_1 << width) - 1;
rtx target, subtarget;
if (arm_arch_thumb2)
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 6b4896de61fc76844ac00b05feb42fa857bba4ca..21eed7bb99c48d508a1c8be9c8f992ae07f3d550 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -406,7 +406,7 @@ (define_expand "vec_set<mode>"
(match_operand:SI 2 "immediate_operand" "")]
"TARGET_NEON"
{
- HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
+ HOST_WIDE_INT elem = HOST_WIDE_INT_1 << INTVAL (operands[2]);
emit_insn (gen_vec_set<mode>_internal (operands[0], operands[1],
GEN_INT (elem), operands[0]));
DONE;
